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[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim] - Rev 973

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Rev Log message Author Age Path
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 8003d 23h /or1k/tags/stable_0_2_0/or1ksim
972 Interrupt suorces fixed. simons 8003d 23h /or1k/tags/stable_0_2_0/or1ksim
971 Now even keyboard test passes. simons 8004d 02h /or1k/tags/stable_0_2_0/or1ksim
970 Testbench is now running on ORP architecture platform. simons 8004d 15h /or1k/tags/stable_0_2_0/or1ksim
957 Flash at 0x04000000 RAM at 0x00000000. Only MMU test works. simons 8006d 16h /or1k/tags/stable_0_2_0/or1ksim
956 Changed to work with or32-uclinux tool chain. Everything works except keyboard test. simons 8006d 20h /or1k/tags/stable_0_2_0/or1ksim
954 some debugging code cleanup markom 8008d 01h /or1k/tags/stable_0_2_0/or1ksim
953 burst detection for bytes & halfwords added markom 8008d 01h /or1k/tags/stable_0_2_0/or1ksim
941 memory optimizations moved into main optimization loop markom 8011d 00h /or1k/tags/stable_0_2_0/or1ksim
940 profiling and cuc can be made in one run markom 8011d 21h /or1k/tags/stable_0_2_0/or1ksim
939 caller saved register r11 fixed markom 8012d 03h /or1k/tags/stable_0_2_0/or1ksim
938 conditional facts does not work for assignments outside BB markom 8012d 03h /or1k/tags/stable_0_2_0/or1ksim
937 added file; cleanup markom 8012d 04h /or1k/tags/stable_0_2_0/or1ksim
936 simple conditional facts generation tested markom 8013d 00h /or1k/tags/stable_0_2_0/or1ksim
934 conditional facts generation markom 8013d 22h /or1k/tags/stable_0_2_0/or1ksim
933 adding fact generation from conditionals; still under development markom 8014d 01h /or1k/tags/stable_0_2_0/or1ksim
932 adv. dead code elimination; few optimizations markom 8014d 02h /or1k/tags/stable_0_2_0/or1ksim
931 more CMOV optimizations; some bugs fixed; more complex optimization structure markom 8014d 20h /or1k/tags/stable_0_2_0/or1ksim
930 more CMOV optimizations; cse tested markom 8014d 22h /or1k/tags/stable_0_2_0/or1ksim
929 add - sfxx optimization markom 8018d 00h /or1k/tags/stable_0_2_0/or1ksim
928 sfor instruction replaced by conditional cmov markom 8018d 01h /or1k/tags/stable_0_2_0/or1ksim
927 problems with LRBB removal solved markom 8018d 01h /or1k/tags/stable_0_2_0/or1ksim
926 regs and loads do not use rst - can yield less logic markom 8018d 19h /or1k/tags/stable_0_2_0/or1ksim
925 new BB joining type; BBID_END added; virtex.tim sample cuc timings markom 8018d 19h /or1k/tags/stable_0_2_0/or1ksim
924 bb joining, basic block triggers bugs fixed; more verilog generation of arbiter markom 8019d 02h /or1k/tags/stable_0_2_0/or1ksim
919 stable release rherveille 8019d 18h /or1k/tags/stable_0_2_0/or1ksim
918 sa command bug fixed markom 8020d 00h /or1k/tags/stable_0_2_0/or1ksim
917 optimize cmovs bug fixed markom 8020d 01h /or1k/tags/stable_0_2_0/or1ksim
915 cuc main verilog file generation markom 8020d 22h /or1k/tags/stable_0_2_0/or1ksim
914 SR[FO] is always set to 1. lampret 8021d 03h /or1k/tags/stable_0_2_0/or1ksim

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