Rev |
Log message |
Author |
Age |
Path |
1176 |
Added comments. |
damonb |
7706d 10h |
/or1k/tags/stable_0_2_0 |
1174 |
fix for immu exceptions that never should have happened |
phoenix |
7707d 14h |
/or1k/tags/stable_0_2_0 |
1170 |
Added support for l.addc instruction. |
csanchez |
7715d 18h |
/or1k/tags/stable_0_2_0 |
1169 |
Added support for l.addc instruction. |
csanchez |
7715d 19h |
/or1k/tags/stable_0_2_0 |
1168 |
Added explicit alignment expressions. |
csanchez |
7721d 05h |
/or1k/tags/stable_0_2_0 |
1167 |
Corrected offset of TSS field within task_struct. |
csanchez |
7721d 05h |
/or1k/tags/stable_0_2_0 |
1166 |
Fixed problem with relocations of non-allocated sections. |
csanchez |
7721d 05h |
/or1k/tags/stable_0_2_0 |
1165 |
timeout bug fixed; contribution by Carlos |
markom |
7737d 23h |
/or1k/tags/stable_0_2_0 |
1161 |
When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. |
lampret |
7741d 12h |
/or1k/tags/stable_0_2_0 |
1160 |
added missing .rodata.* section into rom linker script |
phoenix |
7772d 12h |
/or1k/tags/stable_0_2_0 |
1159 |
No functional changes. Added defines to disable implementation of multiplier/MAC |
lampret |
7784d 14h |
/or1k/tags/stable_0_2_0 |
1158 |
Added simple uart test case. |
lampret |
7785d 16h |
/or1k/tags/stable_0_2_0 |
1157 |
Added syscall test case. |
lampret |
7785d 16h |
/or1k/tags/stable_0_2_0 |
1156 |
Tick timer test case added. |
lampret |
7786d 12h |
/or1k/tags/stable_0_2_0 |
1155 |
No functional change. Only added customization for exception vectors. |
lampret |
7787d 16h |
/or1k/tags/stable_0_2_0 |
1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7795d 08h |
/or1k/tags/stable_0_2_0 |
1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7795d 18h |
/or1k/tags/stable_0_2_0 |
1152 |
*** empty log message *** |
phoenix |
7795d 22h |
/or1k/tags/stable_0_2_0 |
1151 |
*** empty log message *** |
phoenix |
7795d 22h |
/or1k/tags/stable_0_2_0 |
1150 |
remove unneded include |
phoenix |
7796d 00h |
/or1k/tags/stable_0_2_0 |
1149 |
*** empty log message *** |
phoenix |
7796d 11h |
/or1k/tags/stable_0_2_0 |
1148 |
*** empty log message *** |
phoenix |
7796d 11h |
/or1k/tags/stable_0_2_0 |
1147 |
remove unneeded include |
phoenix |
7796d 11h |
/or1k/tags/stable_0_2_0 |
1146 |
cygwin fix |
phoenix |
7796d 12h |
/or1k/tags/stable_0_2_0 |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7796d 12h |
/or1k/tags/stable_0_2_0 |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7798d 18h |
/or1k/tags/stable_0_2_0 |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7799d 08h |
/or1k/tags/stable_0_2_0 |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7799d 08h |
/or1k/tags/stable_0_2_0 |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7800d 17h |
/or1k/tags/stable_0_2_0 |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7800d 17h |
/or1k/tags/stable_0_2_0 |