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[/] [or1k/] [tags/] [stable_0_2_0] - Rev 210

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Rev Log message Author Age Path
210 Updated debug. More cleanup. Added MAC. lampret 8351d 18h /or1k/tags/stable_0_2_0
209 Update debug. lampret 8353d 23h /or1k/tags/stable_0_2_0
208 Initial checkin with working port to or1k chris 8355d 10h /or1k/tags/stable_0_2_0
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.
chris 8355d 14h /or1k/tags/stable_0_2_0
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.
chris 8355d 14h /or1k/tags/stable_0_2_0
205 Adding debug capabilities. Half done. lampret 8359d 18h /or1k/tags/stable_0_2_0
204 Added function prototypes to stop gcc from complaining erez 8362d 09h /or1k/tags/stable_0_2_0
203 Updated from xess branch. lampret 8363d 23h /or1k/tags/stable_0_2_0
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf
erez 8369d 06h /or1k/tags/stable_0_2_0
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8369d 06h /or1k/tags/stable_0_2_0
200 Initial import simons 8372d 13h /or1k/tags/stable_0_2_0
199 Initial import simons 8372d 15h /or1k/tags/stable_0_2_0
198 Moved from testbench.old simons 8375d 02h /or1k/tags/stable_0_2_0
197 This is not used any more. simons 8375d 02h /or1k/tags/stable_0_2_0
196 Configuration SPRs added. simons 8375d 02h /or1k/tags/stable_0_2_0
195 New test added. simons 8375d 02h /or1k/tags/stable_0_2_0
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.
chris 8375d 10h /or1k/tags/stable_0_2_0
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.
chris 8375d 10h /or1k/tags/stable_0_2_0
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.
chris 8375d 20h /or1k/tags/stable_0_2_0
191 Added UART jitter var to sim config chris 8376d 16h /or1k/tags/stable_0_2_0
190 Added jitter initialization chris 8376d 16h /or1k/tags/stable_0_2_0
189 fixed mode handling for tick facility chris 8376d 16h /or1k/tags/stable_0_2_0
188 fixed PIC interrupt controller chris 8376d 16h /or1k/tags/stable_0_2_0
187 minor change to clear pending exception chris 8376d 16h /or1k/tags/stable_0_2_0
186 major change to UART structure chris 8376d 16h /or1k/tags/stable_0_2_0
185 major change to UART code chris 8376d 16h /or1k/tags/stable_0_2_0
184 modified decode for trace debugging chris 8376d 16h /or1k/tags/stable_0_2_0
183 changed special case for PICSR chris 8376d 16h /or1k/tags/stable_0_2_0
182 updated exception handling procedures chris 8376d 16h /or1k/tags/stable_0_2_0
181 Added trace/stall commands chris 8376d 16h /or1k/tags/stable_0_2_0

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