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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [insight/] [opcodes/] [or32.c] - Rev 1780

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1765 root 5598d 08h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1572 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'. 6872d 14h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1557 Fix most warnings issued by gcc4 nogj 6880d 21h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1554 fixed l.maci encoding phoenix 6898d 08h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7011d 11h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1452 Implement a dynamic recompiler to speed up the execution nogj 7038d 14h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7038d 14h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7053d 18h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7088d 13h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1346 Remove the global op structure nogj 7101d 16h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7101d 17h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1341 Mark wich operand is the destination operand in the architechture definition nogj 7101d 17h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1338 l.ff1 instruction added andreje 7117d 15h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1309 removed includes phoenix 7290d 10h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7293d 07h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7315d 07h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1286 Changed desciption of the l.cust5 insns lampret 7364d 10h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1285 Changed desciption of the l.cust5 insns lampret 7364d 10h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1169 Added support for l.addc instruction. csanchez 7677d 11h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1114 Added cvs log keywords lampret 7832d 02h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
1034 Fixed encoding for l.div/l.divu. lampret 7974d 04h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
879 Initial version of OpenRISC Custom Unit Compiler added markom 8039d 14h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
801 l.muli instruction added markom 8131d 17h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
722 floating point registers are obsolete; GPRs should be used instead markom 8159d 17h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
720 single floating point support added markom 8159d 21h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
717 some minor improvements markom 8159d 23h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
714 do_stats introduced for faster no-stats execution markom 8161d 18h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
709 eval_operands is now being generated markom 8165d 00h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
706 insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding markom 8165d 16h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c
703 small optimizations to dissasemble markom 8166d 21h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/or32.c

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