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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [insight/] [opcodes/] - Rev 1765

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1765 root 5667d 16h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6868d 02h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1605 Execute l.ff1 instruction nogj 6875d 21h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1597 Fix parsing the destination register nogj 6887d 23h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1590 Added l.fl1 lampret 6890d 20h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1557 Fix most warnings issued by gcc4 nogj 6950d 06h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1554 fixed l.maci encoding phoenix 6967d 17h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7080d 20h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1452 Implement a dynamic recompiler to speed up the execution nogj 7107d 23h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7107d 23h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7123d 03h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7157d 22h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1346 Remove the global op structure nogj 7171d 01h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7171d 02h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1341 Mark wich operand is the destination operand in the architechture definition nogj 7171d 02h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1338 l.ff1 instruction added andreje 7186d 23h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1309 removed includes phoenix 7359d 19h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1308 Gyorgy Jeney: extensive cleanup phoenix 7362d 16h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7384d 16h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1286 Changed desciption of the l.cust5 insns lampret 7433d 19h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1285 Changed desciption of the l.cust5 insns lampret 7433d 19h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1169 Added support for l.addc instruction. csanchez 7746d 20h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1114 Added cvs log keywords lampret 7901d 11h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
1034 Fixed encoding for l.div/l.divu. lampret 8043d 13h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
879 Initial version of OpenRISC Custom Unit Compiler added markom 8108d 23h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
801 l.muli instruction added markom 8201d 02h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
722 floating point registers are obsolete; GPRs should be used instead markom 8229d 02h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
720 single floating point support added markom 8229d 06h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
717 some minor improvements markom 8229d 07h /or1k/tags/stable_0_2_0_rc2/insight/opcodes
714 do_stats introduced for faster no-stats execution markom 8231d 03h /or1k/tags/stable_0_2_0_rc2/insight/opcodes

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