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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [peripheral/] [16450.c] - Rev 1505

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Rev Log message Author Age Path
1505 Make output clearer nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1504 Use proper types nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1503 Move loopback handling out of uart_clock16 nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1502 Move interrupt handling out of uart_clock16 nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1501 Move RX logic out of uart_clock16 nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1500 Move vapi command handling out of uart_clock16 nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1499 Move TX logic out of uart_clock16 nogj 6967d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 6995d 08h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1476 Change the wording of error messages to more acuretly reflect the error they are talking about. nogj 7016d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1461 Add an optional `enabled' paramter to every peripheral nogj 7043d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1396 Remove useless use of floats nogj 7043d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1394 Fix VAPI in the uart nogj 7043d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1392 Make uart use the new trace functions nogj 7043d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.		 nogj 7043d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1367 Cleanup uart peripheral useing the new callback mechanism nogj 7083d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1366 Pass a caller given pointer to the vapi_read callback nogj 7083d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1359 Pass private data in readfunc/writefunc callbacks nogj 7083d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7083d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7093d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7297d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7465d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1165 timeout bug fixed; contribution by Carlos markom 7704d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1153 When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.

Fix tested w/ both eCos and uclinux.		 sfurman 7761d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.		 sfurman 7762d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7765d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1116 There was a bug in the simulator's UART implementation that caused the
UART's LSR register to become corrupted. This was due to an
assumption that 'char' is an unsigned type, but that is not true on
all platforms.

When the char type is signed and a character is read in the range
0x80-0xff, the high bit is sign-extended into the upper bits of an
entry in the receive FIFO. When the character reaches the head of the
FIFO, the upper bits of the FIFO entry are OR'ed into the LSR, causing
the LSR to be set to 0xFF.

A simple cast fixes the problem.		 sfurman 7805d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1073 channels support rprescott 7931d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
997 PRINTF should be used instead of printf; command redirection repaired markom 7994d 10h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
970 Testbench is now running on ORP architecture platform. simons 8001d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
884 code cleaning - a lot of global variables moved to runtime struct markom 8038d 09h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c

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