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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [peripheral/] [16450.c] - Rev 1765

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1765 root 5607d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6808d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1563 Fix sending too many interrupts in the uart nogj 6888d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1557 Fix most warnings issued by gcc4 nogj 6890d 05h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1549 Spelling fixes nogj 6951d 18h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1518 Print a '\n' at the end of the trace nogj 6957d 02h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1517 Use uint8_t instead of char nogj 6957d 02h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1505 Make output clearer nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1504 Use proper types nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1503 Move loopback handling out of uart_clock16 nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1502 Move interrupt handling out of uart_clock16 nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1501 Move RX logic out of uart_clock16 nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1500 Move vapi command handling out of uart_clock16 nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1499 Move TX logic out of uart_clock16 nogj 6972d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7000d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1476 Change the wording of error messages to more acuretly reflect the error they are talking about. nogj 7020d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1461 Add an optional `enabled' paramter to every peripheral nogj 7047d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1396 Remove useless use of floats nogj 7047d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1394 Fix VAPI in the uart nogj 7047d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1392 Make uart use the new trace functions nogj 7047d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.		 nogj 7047d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1367 Cleanup uart peripheral useing the new callback mechanism nogj 7088d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1366 Pass a caller given pointer to the vapi_read callback nogj 7088d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1359 Pass private data in readfunc/writefunc callbacks nogj 7088d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7088d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7097d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7302d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7469d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1165 timeout bug fixed; contribution by Carlos markom 7708d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c
1153 When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.

Fix tested w/ both eCos and uclinux.		 sfurman 7766d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/16450.c

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