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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [gen_or1k_isa/] - Rev 1778

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Rev Log message Author Age Path
1765 root 5623d 11h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1648 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. 6770d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6770d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1605 Execute l.ff1 instruction nogj 6831d 16h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1601 fixed description of l.sfXXXi lampret 6833d 19h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1597 Fix parsing the destination register nogj 6843d 18h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1591 Added l.fl1, fixed desc of l.ff1 lampret 6846d 15h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1590 Added l.fl1 lampret 6846d 15h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1557 Fix most warnings issued by gcc4 nogj 6906d 01h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1554 fixed l.maci encoding phoenix 6923d 12h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7036d 15h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1452 Implement a dynamic recompiler to speed up the execution nogj 7063d 18h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7063d 18h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7078d 21h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7078d 22h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7113d 16h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1346 Remove the global op structure nogj 7126d 20h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7126d 20h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1341 Mark wich operand is the destination operand in the architechture definition nogj 7126d 21h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1338 l.ff1 instruction added andreje 7142d 18h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1309 removed includes phoenix 7315d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1308 Gyorgy Jeney: extensive cleanup phoenix 7318d 11h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7340d 11h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1286 Changed desciption of the l.cust5 insns lampret 7389d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1285 Changed desciption of the l.cust5 insns lampret 7389d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1169 Added support for l.addc instruction. csanchez 7702d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1114 Added cvs log keywords lampret 7857d 06h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1113 Typos by Maria Bolado lampret 7857d 06h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1111 Small fix for path of tth binary. lampret 7872d 13h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1110 Re-generated. lampret 7872d 14h /or1k/tags/stable_0_2_0_rc3/gen_or1k_isa

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