Rev |
Log message |
Author |
Age |
Path |
1765 |
|
root |
5630d 01h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1648 |
This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. |
|
6777d 04h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1646 |
This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. |
|
6777d 04h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1532 |
Add pretty spr dumping code |
nogj |
6978d 03h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1508 |
Remove m{f,t}spr calls where we can access the spr directly |
nogj |
6979d 12h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1506 |
* Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions. |
nogj |
6979d 12h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1442 |
Replace some problematic calles to mfspr/mtspr with direct access to the spr |
nogj |
7070d 07h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1432 |
Collect most of the cpu state variables in a structure (cpu_state) |
nogj |
7070d 07h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1354 |
typing fixes |
phoenix |
7119d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7120d 06h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
997 |
PRINTF should be used instead of printf; command redirection repaired |
markom |
8021d 15h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
728 |
tick timer works with scheduler |
markom |
8190d 13h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
644 |
Modified logging of SPR accesses. Logging only explicit instruction accesses. |
ivang |
8221d 10h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
624 |
Added logging of writes/read to/from SPR registers. |
ivang |
8228d 07h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
600 |
No more low/high priority interrupts (PICPR removed). Added tick timer exception. |
simons |
8237d 01h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
518 |
some more performance optimizations |
markom |
8252d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
517 |
some performance optimizations |
markom |
8252d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
479 |
connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed |
markom |
8268d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
167 |
- SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed |
markom |
8401d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
123 |
Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault
Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files |
markom |
8458d 10h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
64 |
SPR bit definition moved to spr_defs.h. |
lampret |
8702d 16h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
48 |
Added CCR. |
lampret |
8814d 12h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
30 |
Updated SPRs, exceptions. Added 16450 device. |
lampret |
8830d 01h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |
23 |
Common OR1K backend for OR32 and OR16. |
lampret |
8860d 20h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or1k/sprs.h |