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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [cuc/] [verilog.c] - Rev 1778

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Rev	Log message	Author	Age	Path
1765		root	5588d 07h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1648	This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'.		6735d 10h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1646	This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'.		6735d 10h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1557	Fix most warnings issued by gcc4	nogj	6870d 21h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1555	* Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell. * Changed code to use log2_int() instead of log2(), which is also a builtin library function (fixes compile on gcc4). * Moved is_power2() from sim-config.c to misc.c.	nogj	6870d 21h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7078d 12h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1308	Gyorgy Jeney: extensive cleanup	phoenix	7283d 06h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1244	Added "cm" command to copy data inside memory. Make or1ksim work on little endian platforms. Port to Mac OS X. Some bugfixes. Allow JTAG write access to read-only memory regions.	hpanther	7450d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1103	sync problem in cuc not yet fixed	markom	7877d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1102	few cuc bug fixes	markom	7877d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1101	cuc now compiles	markom	7877d 18h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1098	small bug in cuc fixed	markom	7877d 18h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1061	ELF sym loading improved	markom	7931d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1059	several cuc bugs fixed; different verilog cuc file naming	markom	7944d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1048	breakpoint can be set on labels	markom	7959d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
1001	fixed load/store state machine verilog generation errors	markom	7979d 17h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
997	PRINTF should be used instead of printf; command redirection repaired	markom	7979d 21h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
996	some minor bugs fixed	markom	7980d 19h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
986	outputs out of function are not registered anymore	markom	7983d 20h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	7986d 16h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
940	profiling and cuc can be made in one run	markom	7994d 14h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
937	added file; cleanup	markom	7994d 21h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
933	adding fact generation from conditionals; still under development	markom	7996d 18h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
932	adv. dead code elimination; few optimizations	markom	7996d 19h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
931	more CMOV optimizations; some bugs fixed; more complex optimization structure	markom	7997d 13h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
926	regs and loads do not use rst - can yield less logic	markom	8001d 12h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
925	new BB joining type; BBID_END added; virtex.tim sample cuc timings	markom	8001d 12h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
924	bb joining, basic block triggers bugs fixed; more verilog generation of arbiter	markom	8001d 19h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
915	cuc main verilog file generation	markom	8003d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c
908	busy signal added	markom	8009d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cuc/verilog.c

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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [cuc/] [verilog.c] - Rev 1778

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