Rev |
Log message |
Author |
Age |
Path |
1765 |
|
root |
5606d 22h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1648 |
This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. |
|
6754d 01h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1646 |
This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. |
|
6754d 01h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1555 |
* Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c. |
nogj |
6889d 12h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1538 |
Speed up the immu |
nogj |
6951d 14h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1532 |
Add pretty spr dumping code |
nogj |
6955d 01h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1508 |
Remove m{f,t}spr calls where we can access the spr directly |
nogj |
6956d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1506 |
* Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions. |
nogj |
6956d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1446 |
Cosmetic fixes |
nogj |
7047d 05h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1432 |
Collect most of the cpu state variables in a structure (cpu_state) |
nogj |
7047d 05h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1418 |
Rearange some code such that it is not assumed that except_handle returns |
nogj |
7047d 05h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1416 |
Make the immu use the new debug functions |
nogj |
7047d 05h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1382 |
Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers. |
nogj |
7062d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1358 |
Modularise config file parseing. Paving the way for further modularisation. |
nogj |
7088d 00h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7097d 03h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7110d 07h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7301d 22h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
1174 |
fix for immu exceptions that never should have happened |
phoenix |
7677d 21h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
997 |
PRINTF should be used instead of printf; command redirection repaired |
markom |
7998d 12h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
886 |
MMU registers reserved fields protected from writing. |
simons |
8042d 05h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
884 |
code cleaning - a lot of global variables moved to runtime struct |
markom |
8042d 10h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
713 |
lot of small minor improvements: code documented, cleaned; runs at about same speed when not actually logging, but exe_log is enabled; raw_stats now run only with simple execution - enable RAW_USAGE_STATS macro |
markom |
8170d 12h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
638 |
TLBTR CI bit is now working properly. |
simons |
8201d 00h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
600 |
No more low/high priority interrupts (PICPR removed). Added tick timer exception. |
simons |
8213d 22h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
541 |
lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! |
markom |
8225d 08h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
535 |
stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time |
markom |
8226d 06h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
456 |
Page size bug fixed. |
simons |
8250d 02h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
446 |
ITLBMR register bit fields set in order. |
simons |
8251d 13h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
430 |
dpfault and ipfault exceptions implemented |
markom |
8253d 06h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |
429 |
cache configuration added |
markom |
8253d 06h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/mmu/immu.c |