OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [insight/] [opcodes/] [or32.c] - Rev 1748

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5751d 02h /or1k/trunk/insight/opcodes/or32.c
1672 Store instructions don't modify any register. Don't mark them as such in the
arch. definitions		 nogj 6747d 23h /or1k/trunk/insight/opcodes/or32.c
1656 Pass the instruction operands as part of the op_queue structure. nogj 6748d 00h /or1k/trunk/insight/opcodes/or32.c
1605 Execute l.ff1 instruction nogj 6810d 01h /or1k/trunk/insight/opcodes/or32.c
1597 Fix parsing the destination register nogj 6822d 03h /or1k/trunk/insight/opcodes/or32.c
1590 Added l.fl1 lampret 6825d 00h /or1k/trunk/insight/opcodes/or32.c
1557 Fix most warnings issued by gcc4 nogj 6884d 10h /or1k/trunk/insight/opcodes/or32.c
1554 fixed l.maci encoding phoenix 6901d 21h /or1k/trunk/insight/opcodes/or32.c
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7015d 00h /or1k/trunk/insight/opcodes/or32.c
1452 Implement a dynamic recompiler to speed up the execution nogj 7042d 03h /or1k/trunk/insight/opcodes/or32.c
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7042d 03h /or1k/trunk/insight/opcodes/or32.c
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7057d 07h /or1k/trunk/insight/opcodes/or32.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7092d 01h /or1k/trunk/insight/opcodes/or32.c
1346 Remove the global op structure nogj 7105d 05h /or1k/trunk/insight/opcodes/or32.c
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7105d 05h /or1k/trunk/insight/opcodes/or32.c
1341 Mark wich operand is the destination operand in the architechture definition nogj 7105d 06h /or1k/trunk/insight/opcodes/or32.c
1338 l.ff1 instruction added andreje 7121d 03h /or1k/trunk/insight/opcodes/or32.c
1309 removed includes phoenix 7293d 23h /or1k/trunk/insight/opcodes/or32.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7296d 20h /or1k/trunk/insight/opcodes/or32.c
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7318d 20h /or1k/trunk/insight/opcodes/or32.c
1286 Changed desciption of the l.cust5 insns lampret 7367d 23h /or1k/trunk/insight/opcodes/or32.c
1285 Changed desciption of the l.cust5 insns lampret 7367d 23h /or1k/trunk/insight/opcodes/or32.c
1169 Added support for l.addc instruction. csanchez 7680d 23h /or1k/trunk/insight/opcodes/or32.c
1114 Added cvs log keywords lampret 7835d 15h /or1k/trunk/insight/opcodes/or32.c
1034 Fixed encoding for l.div/l.divu. lampret 7977d 17h /or1k/trunk/insight/opcodes/or32.c
879 Initial version of OpenRISC Custom Unit Compiler added markom 8043d 02h /or1k/trunk/insight/opcodes/or32.c
801 l.muli instruction added markom 8135d 06h /or1k/trunk/insight/opcodes/or32.c
722 floating point registers are obsolete; GPRs should be used instead markom 8163d 06h /or1k/trunk/insight/opcodes/or32.c
720 single floating point support added markom 8163d 10h /or1k/trunk/insight/opcodes/or32.c
717 some minor improvements markom 8163d 11h /or1k/trunk/insight/opcodes/or32.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.