Rev |
Log message |
Author |
Age |
Path |
1508 |
Remove m{f,t}spr calls where we can access the spr directly |
nogj |
6982d 01h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1506 |
* Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions. |
nogj |
6982d 01h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1432 |
Collect most of the cpu state variables in a structure (cpu_state) |
nogj |
7072d 20h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1414 |
Rearange code in the dmmu such that it is not assumed that except_handle returns |
nogj |
7072d 20h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1412 |
Make the dmmu use the new debug functions |
nogj |
7072d 21h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1382 |
Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers. |
nogj |
7088d 00h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1358 |
Modularise config file parseing. Paving the way for further modularisation. |
nogj |
7113d 16h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7122d 19h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7135d 22h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7327d 13h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
1240 |
additional functions to bypass cache and mmu needed for peripheral devices |
phoenix |
7499d 08h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
997 |
PRINTF should be used instead of printf; command redirection repaired |
markom |
8024d 04h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
886 |
MMU registers reserved fields protected from writing. |
simons |
8067d 20h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
884 |
code cleaning - a lot of global variables moved to runtime struct |
markom |
8068d 02h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
638 |
TLBTR CI bit is now working properly. |
simons |
8226d 15h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
600 |
No more low/high priority interrupts (PICPR removed). Added tick timer exception. |
simons |
8239d 13h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
572 |
Some new bugs fixed. |
simons |
8244d 15h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
541 |
lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! |
markom |
8250d 23h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
535 |
stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time |
markom |
8251d 22h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
456 |
Page size bug fixed. |
simons |
8275d 17h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
438 |
ITLB -> DTLB lapsus fixed. |
simons |
8277d 22h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
430 |
dpfault and ipfault exceptions implemented |
markom |
8278d 21h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
429 |
cache configuration added |
markom |
8278d 22h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
425 |
immu and dmmu configurations added |
markom |
8278d 23h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
344 |
added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model |
markom |
8306d 01h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
167 |
- SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed |
markom |
8403d 22h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
102 |
Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. |
lampret |
8486d 07h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
73 |
Fixed all bugs. Now more or less works. IMMU still has some problems (exception start). |
lampret |
8693d 04h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
62 |
OR1K DMMU model. |
lampret |
8705d 05h |
/or1k/trunk/or1ksim/mmu/dmmu.c |
6 |
Just a regular update with exception of cache simulation. MMU simulation still under development. |
lampret |
8927d 15h |
/or1k/trunk/or1ksim/mmu/dmmu.c |