OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [orp/] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5563d 04h /or1k/trunk/orp
1311 add section to rodata phoenix 7194d 07h /trunk/orp
1310 fix stack pointer phoenix 7194d 08h /trunk/orp
1289 Add error-checking; get through gcc -Wall; tidy Makefile partain 7319d 12h /trunk/orp
1287 Added test case for l.cust5 custom instructions lampret 7329d 07h /trunk/orp
1271 Merged branch_qmem into main tree. lampret 7363d 17h /trunk/orp
1270 Merged branch_qmem into main tree. lampret 7363d 18h /trunk/orp
1268 Merged branch_qmem into main tree. lampret 7363d 18h /trunk/orp
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it
dries 7569d 15h /trunk/orp
1195 made the project file a little bit more universal dries 7569d 17h /trunk/orp
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'
dries 7569d 18h /trunk/orp
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7569d 19h /trunk/orp
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7569d 19h /trunk/orp
1176 Added comments. damonb 7632d 23h /trunk/orp
1158 Added simple uart test case. lampret 7712d 04h /trunk/orp
1157 Added syscall test case. lampret 7712d 04h /trunk/orp
1156 Tick timer test case added. lampret 7713d 00h /trunk/orp
1141 WB = 1/2 RISC clock test code enabled. lampret 7727d 06h /trunk/orp
1138 Added some information how to run simulations. lampret 7728d 01h /trunk/orp
1137 Added RFRAM generic and Altera lpm library. lampret 7728d 01h /trunk/orp
1136 Add altera lpm library. lampret 7728d 01h /trunk/orp
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7728d 01h /trunk/orp
1134 Changed location of debug test code to 0. lampret 7728d 01h /trunk/orp
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7728d 01h /trunk/orp
1125 This test case passes. lampret 7749d 07h /trunk/orp
1105 Added WB b3 signals lampret 7847d 18h /trunk/orp
1096 An example of SW and RTL regression log because many people asked for. lampret 7859d 03h /trunk/orp
1094 sys/time.h might not be available for or1k target lampret 7860d 01h /trunk/orp
1093 New UART rx/tx fiel settings (due to or1ksim upgrade) lampret 7860d 01h /trunk/orp
1092 Changed from or32-rtems toolchain to or32-uclinux. lampret 7860d 01h /trunk/orp

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.