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[/] [pci/] [tags/] [asyst_3/] - Rev 105

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Rev Log message Author Age Path
105 Wrong pci_bridge32.v file included in the project! mihad 7646d 15h /pci/tags/asyst_3
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.
mihad 7646d 17h /pci/tags/asyst_3
103 Added test application and modified files to support it. mihad 7693d 14h /pci/tags/asyst_3
102 Cleanup! mihad 7693d 14h /pci/tags/asyst_3
101 Added simulation files. mihad 7693d 15h /pci/tags/asyst_3
100 Cleanup! mihad 7693d 15h /pci/tags/asyst_3
99 Cleanup! mihad 7693d 15h /pci/tags/asyst_3
98 Cleanup. mihad 7693d 15h /pci/tags/asyst_3
97 Doing a little bit of cleanup. mihad 7693d 15h /pci/tags/asyst_3
96 Update! mihad 7693d 15h /pci/tags/asyst_3
95 Removed this file, because it was too large - long download time. mihad 7693d 15h /pci/tags/asyst_3
94 Changed one critical PCI bus signal logic. mihad 7693d 15h /pci/tags/asyst_3
93 Added a test application! mihad 7693d 23h /pci/tags/asyst_3
92 Update! mihad 7693d 23h /pci/tags/asyst_3
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7729d 13h /pci/tags/asyst_3
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7729d 13h /pci/tags/asyst_3
89 Burst 2 error fixed. mihad 7765d 13h /pci/tags/asyst_3
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.
mihad 7771d 12h /pci/tags/asyst_3
87 Updated acording to RTL changes. mihad 7783d 10h /pci/tags/asyst_3
86 Entered the option to disable no response counter in wb master. mihad 7783d 10h /pci/tags/asyst_3
85 Changed Vendor ID defines. mihad 7783d 14h /pci/tags/asyst_3
84 Changed vendor ID. mihad 7787d 09h /pci/tags/asyst_3
83 Cleaned up the code. No functional changes. mihad 7812d 07h /pci/tags/asyst_3
81 Updated synchronization in top level fifo modules. mihad 7826d 03h /pci/tags/asyst_3
79 Updated. mihad 7829d 08h /pci/tags/asyst_3
78 Old files with wrong names removed. mihad 7829d 09h /pci/tags/asyst_3
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7829d 09h /pci/tags/asyst_3
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7832d 08h /pci/tags/asyst_3
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7835d 09h /pci/tags/asyst_3
73 Bug fixes, testcases added. mihad 7835d 09h /pci/tags/asyst_3

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