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[/] [pci/] [tags/] [asyst_3] - Rev 63

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Rev Log message Author Age Path
63 Added additional testcase and changed rst name in BIST to trst mihad 7945d 07h /pci/tags/asyst_3
62 Added BIST signals for RAMs. mihad 7948d 00h /pci/tags/asyst_3
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7956d 00h /pci/tags/asyst_3
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7956d 01h /pci/tags/asyst_3
58 Removed all logic from asynchronous reset network mihad 7961d 01h /pci/tags/asyst_3
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7961d 07h /pci/tags/asyst_3
56 Number of state bits define was removed mihad 7961d 22h /pci/tags/asyst_3
55 Changed state machine encoding to true one-hot mihad 7961d 23h /pci/tags/asyst_3
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7995d 00h /pci/tags/asyst_3
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7995d 04h /pci/tags/asyst_3
52 Oops, never before noticed that OC header is missing mihad 7995d 08h /pci/tags/asyst_3
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7995d 08h /pci/tags/asyst_3
50 Got rid of undef directives mihad 7998d 00h /pci/tags/asyst_3
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7998d 00h /pci/tags/asyst_3
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7998d 00h /pci/tags/asyst_3
47 Known issues repaired mihad 7998d 06h /pci/tags/asyst_3
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 8003d 00h /pci/tags/asyst_3
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8004d 06h /pci/tags/asyst_3
44 Added for testing of Configuration Cycles Type 1 mihad 8004d 07h /pci/tags/asyst_3
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 8004d 07h /pci/tags/asyst_3
42 Removed out of date files mihad 8016d 07h /pci/tags/asyst_3
40 From these Wrod files PDF were created - added future improvements tadej 8094d 22h /pci/tags/asyst_3
39 File not needed tadej 8094d 23h /pci/tags/asyst_3
38 This file is not needed tadej 8095d 01h /pci/tags/asyst_3
37 These files are not needed any more tadej 8095d 02h /pci/tags/asyst_3
36 *** empty log message *** tadej 8095d 02h /pci/tags/asyst_3
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8149d 10h /pci/tags/asyst_3
34 Added missing include statements mihad 8164d 08h /pci/tags/asyst_3
33 Added some testcases, removed un-needed fifo signals mihad 8165d 05h /pci/tags/asyst_3
32 Added include statement that was missing and causing errors mihad 8173d 02h /pci/tags/asyst_3

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