OpenCores
URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] [potato/] - Rev 34

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
34 Prevent flushing the pipeline if it is stalling skordal 3322d 13h /potato
33 Ensure correct read of CSR after stall skordal 3322d 13h /potato
32 Prevent jumping/branching when stalling skordal 3325d 11h /potato
31 Prevent flushing the pipeline if it is stalling skordal 3325d 12h /potato
30 Add testcase for a combination of instructions that fail when using cache skordal 3327d 16h /potato
29 Add reset functionality for the WB arbiter state machine skordal 3330d 11h /potato
28 Add rudimentary User's manual skordal 3336d 11h /potato
27 Prevent exceptions from being taken while stalling skordal 3336d 13h /potato
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3336d 15h /potato
25 Add placeholder cache modules and a wishbone arbiter skordal 3338d 20h /potato
24 Remove unused STRINGIFY macros skordal 3339d 09h /potato
23 Create branch to use for implementing a cache skordal 3339d 09h /potato
22 Fix the potato_get_badvaddr() macro skordal 3339d 10h /potato
21 Upgrade the example design to use a 60 MHz system clock skordal 3339d 10h /potato
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3339d 10h /potato
19 SHA256 benchmark: allow compiler to inline at will skordal 3339d 10h /potato
18 instr_misalign_check: add do_jump to sensitivity list skordal 3341d 10h /potato
17 Improve detection of unaligned instructions skordal 3345d 17h /potato
16 Correct grammar in source code comment skordal 3345d 17h /potato
15 SHA256 benchmark: fix Makefile syntax error skordal 3352d 10h /potato
14 Improve detection of invalid instructions skordal 3352d 11h /potato
13 Add SHA256 benchmark code skordal 3352d 15h /potato
12 Update example design with correct bug-report URL and testbenches skordal 3352d 17h /potato
11 Correct FIFO file header skordal 3352d 17h /potato
10 Add missing FIFO module skordal 3357d 11h /potato
9 Remove dependency on a non-existent target in the Makefile skordal 3357d 11h /potato
8 Clarify instruction ROM naming in the example design README skordal 3364d 14h /potato
7 Add test design for the Nexys 4 board from Digilent skordal 3364d 14h /potato
6 Add ISA tests skordal 3364d 14h /potato
5 Update the README, remove .md extension skordal 3366d 20h /potato

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.