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[/] [raytrac] - Rev 140

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Rev Log message Author Age Path
140 Syncing: its awful work..... jguarin2002 4653d 19h /raytrac
139 Sync jguarin2002 4665d 09h /raytrac
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4670d 00h /raytrac
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4676d 01h /raytrac
136 gogogo jguarin2002 4678d 12h /raytrac
135 Correction on conectiveness of Datapath Control... jguarin2002 4682d 13h /raytrac
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4684d 08h /raytrac
133 Added the instructions queue jguarin2002 4686d 00h /raytrac
132 There was amiss in the cross product datapath decoder jguarin2002 4689d 19h /raytrac
131 Post RTL check on memblock jguarin2002 4690d 02h /raytrac
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4690d 20h /raytrac
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4696d 09h /raytrac
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4703d 11h /raytrac
127 Datapath Control
Done		 jguarin2002 4703d 23h /raytrac
126 dpc: Datapath Control Finished..... test it jguarin2002 4707d 18h /raytrac
125 DPC the result is just left jguarin2002 4708d 12h /raytrac
124 lost.... jguarin2002 4712d 12h /raytrac
123 Datapath Control jguarin2002 4716d 12h /raytrac
122 Datapath Control for RaytracFP jguarin2002 4719d 01h /raytrac
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4721d 13h /raytrac
120 Beta 0 Adder LCELLS 373 jguarin2002 4727d 11h /raytrac
119 382 LEs Adder, RTL viewer Check Ok jguarin2002 4727d 17h /raytrac
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 4728d 00h /raytrac
117 Official reduction achieved 12% jguarin2002 4728d 06h /raytrac
116 Official Reduction is 7%: Adder 420 logic cells, trying to reach out at least 20 less cells jguarin2002 4728d 07h /raytrac
115 Official Reduction is about 7% jguarin2002 4728d 07h /raytrac
114 lost of time.. jguarin2002 4729d 06h /raytrac
113 Will end this tomorrow for sure.... anyway i dont think i will got something below 400... jguarin2002 4734d 20h /raytrac
112 99.7%... almost there jguarin2002 4734d 23h /raytrac
111 99% of work done jguarin2002 4735d 07h /raytrac

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