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[/] [raytrac] - Rev 156

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Rev Log message Author Age Path
156 Test Bench Beta 0.1 jguarin2002 4472d 00h /raytrac
155 Changes applied prior to testbenching using the script tb_compiler.py jguarin2002 4475d 00h /raytrac
154 rt_tb.vhd: This file will be used as the test bench main file jguarin2002 4477d 16h /raytrac
153 last modifications for tb_compiler.py compliance jguarin2002 4477d 16h /raytrac
152 Test bench oriented modifications jguarin2002 4481d 17h /raytrac
151 Previous Work to generate test benching jguarin2002 4540d 13h /raytrac
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4554d 10h /raytrac
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4554d 13h /raytrac
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4554d 14h /raytrac
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4557d 02h /raytrac
146 Interruption Machine jguarin2002 4564d 20h /raytrac
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4569d 09h /raytrac
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4576d 13h /raytrac
143 working on result queue sync decoding signals jguarin2002 4581d 05h /raytrac
142 Additions for the State Machine jguarin2002 4586d 04h /raytrac
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4653d 05h /raytrac
140 Syncing: its awful work..... jguarin2002 4653d 11h /raytrac
139 Sync jguarin2002 4665d 01h /raytrac
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4669d 16h /raytrac
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4675d 17h /raytrac
136 gogogo jguarin2002 4678d 04h /raytrac
135 Correction on conectiveness of Datapath Control... jguarin2002 4682d 05h /raytrac
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4684d 00h /raytrac
133 Added the instructions queue jguarin2002 4685d 16h /raytrac
132 There was amiss in the cross product datapath decoder jguarin2002 4689d 11h /raytrac
131 Post RTL check on memblock jguarin2002 4689d 18h /raytrac
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4690d 12h /raytrac
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.		 jguarin2002 4696d 01h /raytrac
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4703d 03h /raytrac
127 Datapath Control
Done		 jguarin2002 4703d 15h /raytrac

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