OpenCores
URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio] - Rev 33

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
33 Adding common logical layer module. magro732 3595d 20h /rio
32 branches/singleSymbol
Adding a wait-state to only insert one control-symbol into an outbound packet.		 magro732 3599d 00h /rio
31 Fixing compiler errors.
Adding support for inserting control-symbols from receiver into frames.		 magro732 3601d 00h /rio
30 Changing name tags/1.0.1 to tags/1.0.1-release. magro732 3601d 02h /rio
29 Fixed bug in RioSwitch internal Wishbone interconnects. magro732 3601d 03h /rio
28 Correcting bug in RioSwitch.vhd internal Wishbone interconnect.
Modifying an existing test case in TestRioSwitch.vhd to provoke the error.		 magro732 3601d 03h /rio
27 Adding missing code to single-symbol pipelined transmitter. Not tested nor copiled. magro732 3602d 15h /rio
26 Temporary checkin of parallelSymbols branch. It does not work yet. magro732 3763d 02h /rio
25 Correcting compiler errors in TestRioPcsUart.vhd magro732 3769d 20h /rio
24 Changing errornous use statement. magro732 3769d 21h /rio
23 Tagging alpha release 2.0.0. magro732 3886d 14h /rio
22 Tagging release 1.0.0. magro732 3886d 14h /rio
21 Branching of a single symbol version of the new RioSerial. magro732 3886d 14h /rio
20 Adding software C-stack and matching VHDL modules. magro732 3951d 17h /rio
19 Removing synthesis warnings. magro732 3976d 16h /rio
18 Making RioSerial entity the same as before+minor fixes. magro732 3977d 15h /rio
17 Removing latch and improving timing. magro732 3978d 15h /rio
16 Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing. magro732 3978d 16h /rio
15 All testcases are ok. Still needs some tweeks though. magro732 3982d 17h /rio
14 Most issues solved, testbench issues remains. magro732 3985d 16h /rio
13 Timeouts are working. magro732 3988d 17h /rio
12 Backup of recent work, debugging new RioSerial. magro732 3999d 15h /rio
11 Receiver ready, transmitter is compiling. magro732 3999d 16h /rio
10 Branch to develop support for parallel symbols. magro732 3999d 16h /rio
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4041d 04h /rio
8 Adding signal descriptions in comments. magro732 4084d 17h /rio
7 Adding missing generic parameters to RioPacketBuffer. magro732 4171d 21h /rio
6 Adding RioWbBridge. Sorry, no testbench for this one. magro732 4171d 23h /rio
5 Uploading primitive documentation. magro732 4178d 15h /rio
4 Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification. magro732 4201d 04h /rio

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.