| Rev |
Log message |
Author |
Age |
Path |
| 185 |
Restructuring as source repository: Moved sources out of src subdirectory. |
rkastl |
4918d 07h |
/sdhc-sc-core/trunk/grpSdVerification/unitSdVerificationTestbench/sim/wave.do |
| 184 |
Removed WbSlave shell (refs #69)
Moved verification sources to grpSdVerification (fixes #70) |
rkastl |
4921d 01h |
/wave.do |
| 178 |
Fixed regression:
Testbenches did not support synchronous reset. |
rkastl |
4921d 01h |
/wave.do |
| 161 |
Verification:
CardModel: Check CRC on received data |
rkastl |
4921d 01h |
/wave.do |
| 160 |
Verification:
Full random read and write single blocks sequence works with
checks.
Checking the CRC in the card model is missing.
Writing at addresses above the card size is missing.
Erasing is missing. |
rkastl |
4921d 01h |
/wave.do |
| 157 |
Verification:
Testcase with Reads works but Verification not completly
implemented. |
rkastl |
4921d 01h |
/wave.do |
| 153 |
SdVerification:
further development, not done by far |
rkastl |
4921d 01h |
/wave.do |
| 147 |
Sd-Core:
+ Added checking of Busy signal after write |
rkastl |
4921d 01h |
/wave.do |
| 126 |
Read and Write works in simulation, needs verification.
Synthesis works the same like before. |
rkastl |
4921d 02h |
/wave.do |
| 125 |
Write works in simulation |
rkastl |
4921d 02h |
/wave.do |
| 124 |
Write: SdClk is disabled, if no data is available. |
rkastl |
4921d 02h |
/wave.do |
| 123 |
Write: Must be able to halt SdClk, rest is done. |
rkastl |
4921d 02h |
/wave.do |
| 122 |
SdController: Initial read support |
rkastl |
4921d 05h |
/wave.do |
| 113 |
Read with single block works on cards, but not in simulation. SdData.sv
sends data with one "XXXX" cycle right before the crc. |
rkastl |
4921d 05h |
/wave.do |
| 111 |
Sclk moved to neg. edge -> setup and hold times for fast mode are easier
to reach. (only micro sd does not work in fast mode). |
rkastl |
4921d 05h |
/wave.do |
| 109 |
Added a data ram. |
rkastl |
4921d 05h |
/wave.do |
| 108 |
Added a ram to the testbed |
rkastl |
4921d 05h |
/wave.do |
| 106 |
Fixes #29: All cards respond, but they do not all work. |
rkastl |
4921d 05h |
/wave.do |
| 105 |
Changing speed works! refs #33 |
rkastl |
4921d 05h |
/wave.do |
| 101 |
Receiving response to ACMD51 works including data, refs #33. |
rkastl |
4921d 05h |
/wave.do |
| 100 |
SdController: Receiving data after ACMD51, but CRC is wrong |
rkastl |
4921d 05h |
/wave.do |
| 94 |
CmdTimeout (8 Clocks) added, SdData inserted into top, refs #31 |
rkastl |
4921d 05h |
/wave.do |
| 89 |
Fixes #27, R3 uses '1111111' as CRC. |
rkastl |
4921d 05h |
/wave.do |
| 88 |
Timeouts inserted, Sending Card status via Rs232 if changed |
rkastl |
4921d 05h |
/wave.do |
| 85 |
Synthese: TbdSd refactored to enable sharing.
Sim: SdVerificationTestbench to new tcl script ported
SdController: TimeoutGenerator added, refs #27 |
rkastl |
4921d 05h |
/wave.do |
| 84 |
SdController: Refactored |
rkastl |
4921d 05h |
/wave.do |
| 83 |
SdCmd: Refactored |
rkastl |
4921d 05h |
/wave.do |
| 56 |
SdCmd: Receiving generic response works |
rkastl |
4921d 05h |
/wave.do |
| 54 |
SDController: Sending CMD0, and CMD8 after reset works. refs #15. |
rkastl |
4921d 05h |
/wave.do |
| 46 |
Verification: Working on basic functional verification, refs #19. |
rkastl |
4921d 05h |
/wave.do |
