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[/] [socgen/] [trunk/] [tools/] - Rev 81

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Rev Log message Author Age Path
81 morphing xml files to use 1685
removed log directories		 jt_eaton 4990d 06h /socgen/trunk/tools
80 now generate all sims and syns param and filelists for xml jt_eaton 5019d 21h /socgen/trunk/tools
76 added wave.save files
now generate sims Makefile and params.sim
leave sim log and vcd files in sim/run/directory		 jt_eaton 5028d 07h /socgen/trunk/tools
75 added linting using verilator jt_eaton 5031d 23h /socgen/trunk/tools
74 split out sw Makefile into projects /bin
split out _cpu into seperate component		 jt_eaton 5037d 05h /socgen/trunk/tools
72 split T6502 into components
moved io_module into seperate project
removed liblists
direct loads filelists for sims and coverage
add hier type into xml files to generate verilog		 jt_eaton 5045d 07h /socgen/trunk/tools
67 updated installs jt_eaton 5054d 23h /socgen/trunk/tools
66 converted sims to use parameters
added msp and 6502 software installs		 jt_eaton 5055d 22h /socgen/trunk/tools
65 added params.sim to sims
updated install's		 jt_eaton 5060d 23h /socgen/trunk/tools
64 added support for Fedora 13 jt_eaton 5064d 22h /socgen/trunk/tools
63 added install config for Ubuntu 10.10 jt_eaton 5065d 04h /socgen/trunk/tools
61 now generate dut files for coverage
removed use of lndir		 jt_eaton 5068d 22h /socgen/trunk/tools
59 added filelist.core to syn dirs to customize core jt_eaton 5069d 09h /socgen/trunk/tools
57 Now generate all filelists from xml files jt_eaton 5070d 01h /socgen/trunk/tools
56 soc_builder now builds verilog from xml files jt_eaton 5075d 09h /socgen/trunk/tools
54 now set up fpga targets from xml files jt_eaton 5078d 07h /socgen/trunk/tools
50 clean up from last checkin jt_eaton 5080d 21h /socgen/trunk/tools
49 added covered code coverage
added xml descriptors
added soc_Link tool		 jt_eaton 5081d 00h /socgen/trunk/tools
48 added support for covered code checking jt_eaton 5103d 06h /socgen/trunk/tools
46 removed hard coded component names from design files
define file is always defines.v
top level is always top.v		 jt_eaton 5117d 09h /socgen/trunk/tools
41 added kim-1 design and program
now support Nexys2 sdram		 jt_eaton 5152d 08h /socgen/trunk/tools
28 added T6502 processor
added vga_char_ctrl		 jt_eaton 5183d 08h /socgen/trunk/tools
27 added uart and ps2 host and models
added more documentation		 jt_eaton 5204d 23h /socgen/trunk/tools
26 moved install instructions from doc -> tools
added scripts to install or32 gnu toolchain and fizzim state tool		 jt_eaton 5213d 11h /socgen/trunk/tools
25 updated for ubuntu 10.4 install jt_eaton 5214d 03h /socgen/trunk/tools
23 fixed typos and ommisions jt_eaton 5215d 07h /socgen/trunk/tools
22 added install instructions for ubuntu 10.4 jt_eaton 5215d 08h /socgen/trunk/tools
20 added Nexys2 support
expanded docs
created tools directory		 jt_eaton 5215d 20h /socgen/trunk/tools

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