OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk] - Rev 60

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
60 moved alu_logic into seperate component jt_eaton 5069d 23h /socgen/trunk
59 added filelist.core to syn dirs to customize core jt_eaton 5069d 23h /socgen/trunk
58 removed old Makefiles jt_eaton 5070d 14h /socgen/trunk
57 Now generate all filelists from xml files jt_eaton 5070d 15h /socgen/trunk
56 soc_builder now builds verilog from xml files jt_eaton 5075d 23h /socgen/trunk
55 removed pre-rout and gates sims jt_eaton 5078d 19h /socgen/trunk
54 now set up fpga targets from xml files jt_eaton 5078d 20h /socgen/trunk
53 fixed check_fpgas jt_eaton 5081d 10h /socgen/trunk
52 removed noworking sims and syn jt_eaton 5081d 10h /socgen/trunk
51 removed old test jt_eaton 5081d 10h /socgen/trunk
50 clean up from last checkin jt_eaton 5081d 11h /socgen/trunk
49 added covered code coverage
added xml descriptors
added soc_Link tool		 jt_eaton 5081d 14h /socgen/trunk
48 added support for covered code checking jt_eaton 5103d 20h /socgen/trunk
47 removed old variant jt_eaton 5117d 23h /socgen/trunk
46 removed hard coded component names from design files
define file is always defines.v
top level is always top.v		 jt_eaton 5117d 23h /socgen/trunk
45 added 6502 sims/software and synth jt_eaton 5124d 19h /socgen/trunk
44 added new parts and sw for 6502 jt_eaton 5124d 22h /socgen/trunk
43 complete rework of states and sequencer
added interrupts
moved prog space and vectors to F space		 jt_eaton 5134d 20h /socgen/trunk
42 removed old versions that used prog as C space jt_eaton 5134d 21h /socgen/trunk
41 added kim-1 design and program
now support Nexys2 sdram		 jt_eaton 5152d 21h /socgen/trunk
40 removed test for deleted block jt_eaton 5152d 22h /socgen/trunk
39 added io_probe to sims
added boot rom into 6502
added T6502_control		 jt_eaton 5161d 10h /socgen/trunk
38 fsm level removed jt_eaton 5161d 10h /socgen/trunk
37 continued to clean up inst decodes to alu and move datapath out of sequencer
removed latched alu_result, now uses raw		 jt_eaton 5170d 17h /socgen/trunk
36 split out alu_ctrl block
split out alu decode signals		 jt_eaton 5171d 11h /socgen/trunk
35 added T6502 doc jt_eaton 5172d 14h /socgen/trunk
34 removed BCD mode from T6502
started to convert design to use datapath logic for alu		 jt_eaton 5177d 17h /socgen/trunk
33 removed unused block jt_eaton 5177d 17h /socgen/trunk
32 renamed to T6502_state_fsm jt_eaton 5178d 00h /socgen/trunk
31 split T6502_fsm out into smaller blocks jt_eaton 5178d 14h /socgen/trunk

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.