OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0] - Rev 249

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
249 Fix bug report
"Deassertion of PROG too early"
PROG is deasserted at end of XTAL3 now		 arniml 6606d 10h /t48/tags/rel_1_0
248 initial check-in arniml 6606d 10h /t48/tags/rel_1_0
247 initial check-in arniml 6606d 12h /t48/tags/rel_1_0
246 initial check-in arniml 6608d 12h /t48/tags/rel_1_0
245 initial check-in arniml 6608d 12h /t48/tags/rel_1_0
244 note about Simili arniml 6614d 11h /t48/tags/rel_1_0
243 update to version 0.4 arniml 6614d 11h /t48/tags/rel_1_0
242 initial check-in arniml 6614d 11h /t48/tags/rel_1_0
241 include t8048 and t8039 testbenches arniml 6626d 10h /t48/tags/rel_1_0
240 comment added about lower 1k of external ROM arniml 6626d 10h /t48/tags/rel_1_0
239 adapt t48 external ROM offset arniml 6626d 10h /t48/tags/rel_1_0
238 initial check-in arniml 6626d 11h /t48/tags/rel_1_0
237 initial check-in arniml 6626d 11h /t48/tags/rel_1_0
236 initial check-in arniml 6626d 12h /t48/tags/rel_1_0
235 cleanup dependencies arniml 6628d 11h /t48/tags/rel_1_0
234 cleanup & enhance external access arniml 6628d 11h /t48/tags/rel_1_0
233 added external ROM arniml 6628d 11h /t48/tags/rel_1_0
232 update to new memory concept arniml 6629d 10h /t48/tags/rel_1_0
231 obsoleted by new memory concept arniml 6629d 10h /t48/tags/rel_1_0
230 simplify shell command execution arniml 6629d 10h /t48/tags/rel_1_0
229 rework hex/simulation targets arniml 6629d 10h /t48/tags/rel_1_0
228 replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom arniml 6629d 10h /t48/tags/rel_1_0
227 replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom arniml 6629d 10h /t48/tags/rel_1_0
226 replaced syn_ram with generic_ram_ena arniml 6629d 10h /t48/tags/rel_1_0
225 replaced syn_rom and syn_ram with t48_rom and generic_ram_ena arniml 6629d 10h /t48/tags/rel_1_0
224 initial check-in arniml 6629d 10h /t48/tags/rel_1_0
223 obsoleted arniml 6629d 10h /t48/tags/rel_1_0
222 add note about clock enable for data memory RAM macro arniml 6630d 10h /t48/tags/rel_1_0
221 new input xtal_en_i arniml 6630d 10h /t48/tags/rel_1_0
220 new input xtal_en_i arniml 6630d 10h /t48/tags/rel_1_0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.