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[/] [t48/] [tags/] [rel_1_1] - Rev 92

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Rev Log message Author Age Path
92 work around bug in Quartus II 4.0 arniml 7394d 07h /t48/tags/rel_1_1
91 fix edge detector bug for counter arniml 7394d 07h /t48/tags/rel_1_1
90 intial check-in arniml 7394d 07h /t48/tags/rel_1_1
89 initial check-in arniml 7408d 03h /t48/tags/rel_1_1
88 allow memory bank switching during interrupts arniml 7409d 05h /t48/tags/rel_1_1
87 abort gracfullt if memory bank switching does not work arniml 7409d 05h /t48/tags/rel_1_1
86 update notice about expander port instructions arniml 7409d 11h /t48/tags/rel_1_1
85 initial check-in arniml 7409d 11h /t48/tags/rel_1_1
84 add if_timing module arniml 7415d 02h /t48/tags/rel_1_1
83 connect if_timing to P2 output of T48 arniml 7415d 02h /t48/tags/rel_1_1
82 check expander timings arniml 7415d 02h /t48/tags/rel_1_1
81 initial check-in arniml 7415d 06h /t48/tags/rel_1_1
80 added if_timing arniml 7415d 06h /t48/tags/rel_1_1
79 add if_timing module arniml 7415d 06h /t48/tags/rel_1_1
78 adjust external timing of BUS arniml 7415d 06h /t48/tags/rel_1_1
77 move from std_logic_arith to numeric_std arniml 7415d 23h /t48/tags/rel_1_1
76 initial check-in arniml 7416d 03h /t48/tags/rel_1_1
75 remove obsolete design unit arniml 7416d 03h /t48/tags/rel_1_1
74 enhance pass/fail detection arniml 7416d 11h /t48/tags/rel_1_1
73 removed dummy_s - workaround not longer needed for GHDL 0.11.1 arniml 7416d 11h /t48/tags/rel_1_1
72 removed superfluous signal from sensitivity list arniml 7416d 11h /t48/tags/rel_1_1
71 add T8039 and its testbench arniml 7422d 04h /t48/tags/rel_1_1
70 clean test cell before make arniml 7422d 04h /t48/tags/rel_1_1
69 fix name of istrobe arniml 7422d 04h /t48/tags/rel_1_1
68 connect T0 and T1 to P1 arniml 7422d 04h /t48/tags/rel_1_1
67 initial check-in arniml 7422d 04h /t48/tags/rel_1_1
66 add temporary workaround for GHDL 0.11 arniml 7422d 04h /t48/tags/rel_1_1
65 clean up sensitivity list arniml 7422d 04h /t48/tags/rel_1_1
64 + enhance instruction strobe generation
+ rework address output under EA=1 conditions		 arniml 7422d 04h /t48/tags/rel_1_1
63 reset machine state to MSTATE3 to allow proper instruction fetch
after reset		 arniml 7422d 04h /t48/tags/rel_1_1

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