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URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

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Rev Log message Author Age Path
345 remove trunk after tagging rel_1_4 arniml 543d 12h /t48
344 release 1.4 arniml 543d 12h /t48
343 branch wip_t2x merged into trunk at 342 arniml 543d 12h /t48
342 merge branch wip_t2x into trunk arniml 543d 12h /t48
341 interrupt test for 8022 arniml 566d 16h /t48
340 adapt int tests to ALE sampling arniml 566d 16h /t48
339 fix RETI for 8022 arniml 566d 16h /t48
338 sample int with rising ALE arniml 566d 16h /t48
337 t8022 synthesis arniml 566d 17h /t48
336 docs arniml 566d 18h /t48
335 simplify up41 test setup arniml 566d 21h /t48
334 fix timing of sel_an*, rad arniml 567d 08h /t48
333 add t8022 arniml 567d 14h /t48
332 mcs2x tests arniml 568d 11h /t48
331 release 1.3 arniml 568d 16h /t48
330 add t8021 arniml 568d 17h /t48
329 start work on t2x arniml 569d 10h /t48
328 prepare 1.3 arniml 571d 12h /t48
327 update integration manual arniml 572d 09h /t48
326 refine status_q update arniml 572d 14h /t48
325 experimental upi41_db_bus variant with asynchronous master interface arniml 572d 21h /t48
324 enhance access timing in test bench arniml 572d 21h /t48
323 - prevent change when master reads status
- relax master access timing
arniml 573d 20h /t48
322 hold db_dir_o during entire access arniml 575d 11h /t48
321 improve compatibility with modelsim and ghdl arniml 576d 09h /t48
320 improve in test arniml 576d 09h /t48
319 - add dma test
- update dma logic
arniml 578d 12h /t48
318 t8042ah synth, fix warnings arniml 578d 16h /t48
317 implement dma logic arniml 578d 17h /t48
316 doc arniml 578d 21h /t48

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