OpenCores
URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block] - Rev 40

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
40 Adding doxygen documentation leonardoaraujo.santos 4409d 13h /uart_block
39 Working on testbench leonardoaraujo.santos 4409d 14h /uart_block
38 Adding testbench validation ....
We could still have some problem on the data_ready of serial_receiver block		 leonardoaraujo.santos 4412d 10h /uart_block
37 Working on the documentation leonardoaraujo.santos 4413d 11h /uart_block
36 Working on the documentation leonardoaraujo.santos 4413d 12h /uart_block
35 Bug really fixed... Some testbench results saved... Now would be a nice Idea to start thinking about documentation... leonardoaraujo.santos 4416d 13h /uart_block
34 Seems that the issue is solved (working on Spartan3E board and confirmed with chipscope) leonardoaraujo.santos 4416d 15h /uart_block
33 Adding some images leonardoaraujo.santos 4417d 18h /uart_block
32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...		 leonardoaraujo.santos 4417d 20h /uart_block
31 Working on documentation and on Chipscope leonardoaraujo.santos 4418d 08h /uart_block
30 Preparing to work with chipscope leonardoaraujo.santos 4418d 09h /uart_block
29 Preparing to work with chipscope leonardoaraujo.santos 4418d 09h /uart_block
28 Changing wrong datasheet of Spartan3A kit for newer one.... Detected some bug on the reception (When is fast it seems that the reception could be wrong...) leonardoaraujo.santos 4418d 10h /uart_block
27 First version seems working nice on the PC!!! leonardoaraujo.santos 4418d 11h /uart_block
26 Adding Spartan3A Starter kit leonardoaraujo.santos 4418d 18h /uart_block
25 Adding some sample code on the doc folder, also adding the wishbone public domain library file leonardoaraujo.santos 4418d 18h /uart_block
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 4419d 16h /uart_block
23 Working on uart_control refactoring leonardoaraujo.santos 4419d 17h /uart_block
22 Refactoring the uart_control leonardoaraujo.santos 4419d 20h /uart_block
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 4420d 02h /uart_block
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 4420d 10h /uart_block
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4420d 11h /uart_block
18 sdsd leonardoaraujo.santos 4420d 18h /uart_block
17 Working on slave testbench and fixing some bugs leonardoaraujo.santos 4420d 19h /uart_block
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4420d 19h /uart_block
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4420d 20h /uart_block
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4421d 16h /uart_block
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4421d 17h /uart_block
12 Working on the communication blocks leonardoaraujo.santos 4421d 18h /uart_block
11 Adding uart_communication_block leonardoaraujo.santos 4421d 20h /uart_block

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.