OpenCores
URL https://opencores.org/ocsvn/versatile_fifo/versatile_fifo/trunk

Subversion Repositories versatile_fifo

[/] [versatile_fifo] - Rev 32

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
32 fixed SYN directives marcus.erlandsson 4973d 17h /versatile_fifo
31 port map unneback 5044d 10h /versatile_fifo
30 port map unneback 5044d 10h /versatile_fifo
29 ACTEL syn define unneback 5052d 07h /versatile_fifo
28 ACTEL async dual way FIFO unneback 5059d 17h /versatile_fifo
27 initial commit, dual way simplex FIFO unneback 5060d 08h /versatile_fifo
26 added ACTEL synthesis directive as define, +ACTEL unneback 5060d 08h /versatile_fifo
25 DFF SR as separate logic unneback 5200d 04h /versatile_fifo
24 updated fifo interfaces with re/rd and we/wr unneback 5200d 19h /versatile_fifo
23 unneback 5203d 07h /versatile_fifo
22 async fifo with multiple queues unneback 5203d 08h /versatile_fifo
21 added DFF SR unneback 5217d 05h /versatile_fifo
20 unneback 5217d 12h /versatile_fifo
19 DFF with async clear and set for Altera cycloneIV unneback 5218d 18h /versatile_fifo
18 ADDR and DATA width set to 8 resp 32 unneback 5219d 08h /versatile_fifo
17 based on updated versatile counter unneback 5223d 07h /versatile_fifo
16 changed power of two style unneback 5486d 16h /versatile_fifo
15 doc updated
gray_counter_defines added
dual port RAM updated		 unneback 5490d 10h /versatile_fifo
14 added PDF unneback 5534d 17h /versatile_fifo
13 adr update unneback 5535d 19h /versatile_fifo
12 no mux on dual port mem read unneback 5548d 12h /versatile_fifo
11 name conflict
wptr1 changed to wptr1_cnt etc		 unneback 5548d 15h /versatile_fifo
10 rptr2 unneback 5548d 16h /versatile_fifo
9 unneback 5554d 12h /versatile_fifo
8 unneback 5554d 12h /versatile_fifo
7 unneback 5554d 12h /versatile_fifo
6 unneback 5554d 15h /versatile_fifo
5 async compare for fifo full and empty unneback 5554d 15h /versatile_fifo
4 unneback 5554d 19h /versatile_fifo
3 unneback 5554d 19h /versatile_fifo

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.