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Subversion Repositories vga_lcd

[/] [vga_lcd/] [trunk] - Rev 62

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Rev Log message Author Age Path
62 New directory structure. root 5585d 15h /vga_lcd/trunk
60 all WB outputs are registered, but just when we dont use cursors markom 7580d 13h /trunk
59 Removed ctrl register's clut and vide bank switch from the register test. As they get reset automatically. This may result to erroneous errors. rherveille 7612d 19h /trunk
58 Enabled Fifo Underrun test rherveille 7612d 19h /trunk
57 1) Rewrote vga_fifo_dc. It now uses gray codes and a more elaborate anti-metastability scheme.
2) Changed top level and pixel generator to reflect changes in the fifo.
3) Changed a bug in vga_fifo.
4) Changed pixel generator and wishbone master to reflect changes.		 rherveille 7633d 14h /trunk
56 Removed 'or negedge arst' from sluint/luint sensitivity list rherveille 7662d 11h /trunk
55 Initial release. rherveille 7719d 11h /trunk
54 Added DVI tests rherveille 7719d 11h /trunk
53 Fixed some Wishbone RevB.3 related bugs.
Changed layout of the core. Blocks are located more logically now.
Started work on a dual clocked/double edge 12bit output. Commonly used by external devices like DVI transmitters.		 rherveille 7719d 16h /trunk
52 Numerous updates and added checks rherveille 7719d 16h /trunk
51 Forgot to change document revision number rherveille 7767d 11h /trunk
50 Forgot to change document revision rherveille 7767d 11h /trunk
49 Added WISHBONE revB.3 signals rherveille 7767d 12h /trunk
48 WISHBONE revB.3 signals added rherveille 7767d 12h /trunk
47 Added wb_b3_check
Removed ud_cnt, ro_cnt		 rherveille 7768d 08h /trunk
46 Added WISHBONE revB.3 sanity checks rherveille 7768d 08h /trunk
45 Changed timing generator; made it smaller and easier. rherveille 7768d 13h /trunk
44 Changed timing section in VGA core, changed testbench accordingly.
Fixed bug in 'timing check' test.		 rherveille 7768d 13h /trunk
43 Added WISHBONE revB.3 Registered Feedback Cycles support rherveille 7769d 04h /trunk
41 specs version 1.1 rherveille 8101d 14h /trunk
40 no message rherveille 8101d 15h /trunk
39 Changed video timing generator.
Changed wishbone master vertical gate count code.
Fixed a potential bug in the wishbone slave (cursor color register readout).		 rherveille 8101d 16h /trunk
38 Changed testbench to reflect modified VGA timing generator. rherveille 8101d 16h /trunk
37 Fixed a potential reset bug in the hint & vint generation. rherveille 8116d 19h /trunk
36 Fixed two small bugs that only showed up when the hardware cursors were disabled rherveille 8124d 21h /trunk
35 no message rherveille 8125d 00h /trunk
34 Added hardware cursor support to wishbone master.
Added provision to turn-off 3D cursors.
Fixed some minor bugs.		 rherveille 8148d 10h /trunk
33 Added 64x64pixels 4bpp hardware cursor support. rherveille 8148d 15h /trunk
32 Fixed dat_o incomplete sensitivity list. rherveille 8155d 20h /trunk
31 Some minor bug-fixes.
Changed vga_ssel into vga_curproc (cursor processor).		 rherveille 8164d 15h /trunk

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