Rev |
Log message |
Author |
Age |
Path |
147 |
Cleans up div_tb a bit, causing it to write SUCCESS out if successful and
abort if not. |
dgisselq |
3040d 11h |
/zipcpu |
146 |
Fixes a problem where the assembler complained the compiler was trying to
move .org backwards. This is now fixed. |
dgisselq |
3040d 11h |
/zipcpu |
145 |
This fixes the pipelined memory problem that was introduced a while back to
fix ... pipelined memory conflicts. This appears to maintain the success
of the fix, while recovering the pipeline memory performance that was had
before. |
dgisselq |
3040d 11h |
/zipcpu |
144 |
Makes the auto-reload capability a configuration option, and fills out the
reset so that it is properly implemented. |
dgisselq |
3040d 11h |
/zipcpu |
143 |
This section belatedly adjusts the zasm assembler so that it can handle
the LONG_MPY changes that have taken place. However, the test.S assembler
test script is still not properly testing the multiplies--at least it will
succeed on everything else. |
dgisselq |
3040d 11h |
/zipcpu |
142 |
Bug fix--fixes some problems with conditional execution, as well as removing
an unnecessary peephole optimization. |
dgisselq |
3041d 12h |
/zipcpu |
141 |
Fixes two bugs: one causing merged strings in the read only string section to
be referenced at the wrong address, and the second which caused the assembler
to fail at SYMBOL-OFFSET references. |
dgisselq |
3041d 12h |
/zipcpu |
140 |
Minor changes, but fixes build of zippy_tb.cpp. |
dgisselq |
3044d 00h |
/zipcpu |
139 |
Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details. |
dgisselq |
3046d 22h |
/zipcpu |
138 |
This updates the CPU multiply instruction into a set of three instructions.
MPY is a 32x32-bit multiply instruction, returning the low 32-bit result,
MPYUHI returns the upper 32-bits assuming the result was unsigned and MPYSHI
returns the upper 32-bits assuming the result was signed. |
dgisselq |
3046d 22h |
/zipcpu |
137 |
This should (again) fix the bug of trying to build optest.cpp. |
dgisselq |
3060d 15h |
/zipcpu |
136 |
Oops --- missed a couple HOST_WIDE_INT values in a printf. This casts them
to (long), so that we can work on both PC's and ARMs. |
dgisselq |
3060d 16h |
/zipcpu |
135 |
Replaced all occurrences of INTVAL(...) on printf lines with (long)INTVAL(...).
This should fix the problems zip-gcc was having while running on the ARM. |
dgisselq |
3060d 16h |
/zipcpu |
134 |
Working updates, to keep this up to date with the RTL code. |
dgisselq |
3061d 12h |
/zipcpu |
133 |
Changes preceding an instruction set update, which will change the multiply
operation from a 16x16 bit multiply to three types of 32x32-bit multiplies. |
dgisselq |
3061d 12h |
/zipcpu |
132 |
Lots of minor bug fixes. |
dgisselq |
3061d 12h |
/zipcpu |
131 |
Fixed a variable use before declaration error. |
dgisselq |
3061d 12h |
/zipcpu |
130 |
Simplified the lock logic, and removed it when pipelining was not defined. This
also means the file is now dependent upon cpudefs.v. In another change, brev
was modified so as not to update the flags. This makes it useable with GCC
as a potential move or load immediate instruction. |
dgisselq |
3061d 12h |
/zipcpu |
129 |
Bug fix. Fixes some ugly race conditions that would cause code from the wrong
address to be executed. |
dgisselq |
3061d 13h |
/zipcpu |
128 |
Cleaned up some comments. |
dgisselq |
3061d 13h |
/zipcpu |
127 |
Lots of changes and bugfixes. The disassembler produces more readable output.
The assembler and linker will no longer automatically use LDIHI--in preparation
for switching to LONG_MPY. LDIHI/LDILO pairs have been changed to BREV/LDILO
pairs. Within the compiler, conditional moves have been rebuilt. They're not
perfect yet, but they are better. Lots of peephole optimizations, etc. |
dgisselq |
3061d 13h |
/zipcpu |
126 |
Lots of changes preparing the assembly for an instruction set change. While
implemented, they are still commented out via #ifdef LONG_MPY. By defining
LONG_MPY, this new change set will take place. |
dgisselq |
3061d 13h |
/zipcpu |
125 |
This patch contains minor updates. Two are important to mention: 1) It turns
the compare optimizations back on within the zip.md file, and 2) it fixes an
internal compiler fault that was causing the compiler to such up all of my
memory in an infinite recursion. |
dgisselq |
3069d 20h |
/zipcpu |
124 |
Lots of changes, lots of bugfixes--both to the compiler as well as to the
assembler. (Ex: the assembler will now properly execute a LDI _sym+5,R0).
Many compiler optimizations have been turned off, however. They will probably
be turned back on in the near future--once I get this version proven without
them. |
dgisselq |
3071d 10h |
/zipcpu |
123 |
This test now catches and tests some of the pipeline bugs I've been chasing. |
dgisselq |
3071d 10h |
/zipcpu |
122 |
This represents a major rewrite of the machine definition file, gcc/config/zip/
zip.md. In particular, the architecture has been changed from a "cc0"
architecture to one with a specific CC_REG and CCmode. Instructions in the
machine definition file must now explicitly set this register with their
results. The result is better condition code handling, better usage of the
conditional execution modes of certain instructions, and even some decent
optimizations. |
dgisselq |
3076d 14h |
/zipcpu |
121 |
Fixed the bug whereby BGE instructions dissassembled as BGT instructions and
vice versa. Loads and stores of absolute addresses now show those addresses
in ($<>). The assembler also accepts integer offsets to symbols, although
it isn't clear that it does the "right" thing with them yet. |
dgisselq |
3076d 14h |
/zipcpu |
120 |
Should've regression tested that last build. This one fixes what that last
fix broke: Registers with offsets (i.e. operand-B) now work (again). |
dgisselq |
3080d 10h |
/zipcpu |
119 |
Fixed some limits bugs. Now LDI.Z 1 produces LDIHI.Z 0, LDOLO.Z 1 as desired
instead of the erroneous BREV.Z 0. Likewise, loading 0x80000000 no longer
produces a clear instruction, but actually loads the value of interest. |
dgisselq |
3080d 10h |
/zipcpu |
118 |
Fixes two bugs: 1) in the early branching code within the instruction decoder.
This prevented the early branching from working when built with Xilinx's tools,
while the code worked with Verilator. 2) The CPU was not working with the
traditional cache and early branching disabled. These two bugs masked each
other. The replacement code is simpler. |
dgisselq |
3080d 13h |
/zipcpu |