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Rev Log message Author Age Path
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4708d 08h /
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4708d 09h /
355 Import Julius Baxter's verilator hints from ORPSoC olof 4708d 10h /
354 Whitespace cleanup olof 4708d 11h /
353 Inherit fixes for bit width of constants from ORPSoC olof 4710d 12h /
352 Removed delayed assignments from rtl code olof 4714d 18h /
351 Turn defines into parameters in eth_cop olof 4723d 08h /
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4723d 08h /
349 Make all parameters configurable from top level olof 4724d 09h /
348 Added option to dump VCD files olof 4725d 08h /
347 Added information about running with Icarus Verilog olof 4725d 09h /
346 Updated project location olof 4725d 11h /
345 Temporarily disable failing tests olof 4725d 12h /
344 bit 9 in phy control register is self clearing olof 4731d 14h /
343 Address miss should not be asserted on short frames olof 4735d 10h /
342 Added cast to avoid inequality when comparing different data types olof 4735d 10h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4735d 11h /
340 Don't fail if log dir already exists olof 4736d 08h /
339 Added basic support for Icarus Verilog olof 4737d 07h /
338 root 5529d 13h /
337 root 5585d 15h /
336 Added old uploaded documents to new repository. root 5586d 18h /
335 New directory structure. root 5586d 18h /
334 Minor fixes for Icarus simulator. igorm 7034d 20h /
333 Some small fixes + some troubles fixed. igorm 7035d 08h /
332 Case statement improved for synthesys. igorm 7048d 14h /
331 Tests for delayed CRC and defer indication added. igorm 7063d 15h /
330 Warning fixes. igorm 7063d 16h /
329 Defer indication fixed. igorm 7063d 17h /
328 Delayed CRC fixed. igorm 7063d 17h /

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