Rev |
Log message |
Author |
Age |
Path |
60 |
Bringing the main directory up to date with the github repository |
dgisselq |
2761d 11h |
/ |
59 |
Removed no-longer-used files. |
dgisselq |
2761d 11h |
/ |
58 |
Added the current sim sw back in within the sim subdirectory |
dgisselq |
2761d 11h |
/ |
57 |
Removed the remaining bench/cpp files.
These are moved to the sim/verilator directory. |
dgisselq |
2761d 11h |
/ |
56 |
Files moved to the new sim directory |
dgisselq |
2761d 11h |
/ |
55 |
Updated the documentation for 8-bit bytes. |
dgisselq |
2761d 11h |
/ |
54 |
Added in a working C-library for the ZipCPU.
Provides stdin/stdout support. |
dgisselq |
2761d 11h |
/ |
53 |
Removing the artyboard.h file from the dev directory. |
dgisselq |
2761d 11h |
/ |
52 |
Updated sw for the Arty. |
dgisselq |
2761d 11h |
/ |
51 |
Updated host software, following 8-bit byte updates. |
dgisselq |
2761d 12h |
/ |
50 |
Updated the CPU and distribution in general to handle 8-bit bytes. |
dgisselq |
2761d 12h |
/ |
49 |
Moved the location of the ZIPSYSTEM in memory, made the artyboard.h constants
more friendly and more complete, fixed two bugs in the CPU (jumps to breaks,
and s/w clearing of icache), added a NO_USERMODE option to the CPU, and more.
Rebuild any user programs before using this build. |
dgisselq |
2886d 01h |
/ |
48 |
Greatly expanded the specification, including how to's, getting started guide,
register definitions, etc. |
dgisselq |
2888d 14h |
/ |
47 |
Updated. |
dgisselq |
2906d 05h |
/ |
46 |
Sped the UART simulator back up to 1MBaud. |
dgisselq |
2906d 05h |
/ |
45 |
Updated the flash, and the flash test bench, for Quad I/O read commands. |
dgisselq |
2906d 05h |
/ |
44 |
Fixed the flash so that it now runs in 1) high speed (41MHz), and 2) that it
doesn't struggle to do read bursts. This should greatly speed up access time. |
dgisselq |
2906d 05h |
/ |
43 |
Cleaned up the CPU memory documentation. |
dgisselq |
2906d 05h |
/ |
42 |
Fixed up the CPU so that it passes a multiply test bench, in addition to the
CPU test. |
dgisselq |
2906d 05h |
/ |
41 |
Added the CPU test program to the Arty distribution. This works. |
dgisselq |
2906d 05h |
/ |
40 |
Fixed a problem with the declaration of variables to be volatile. |
dgisselq |
2906d 05h |
/ |
39 |
Fixes the OLED test so that it runs using the DMA. |
dgisselq |
2906d 05h |
/ |
38 |
ZipLoad can now load programs to non-reset locations. |
dgisselq |
2906d 05h |
/ |
37 |
Updated documentation and copyright. |
dgisselq |
2906d 05h |
/ |
36 |
Lots of changes, see the git changelog for details. |
dgisselq |
2912d 14h |
/ |
35 |
Added comments and copyright notice. |
dgisselq |
2916d 02h |
/ |
34 |
These updates bring the distribution along to the point where both the GPS
clock subsecond tracking, as well as the OLEDrgb controller now work. |
dgisselq |
2916d 04h |
/ |
33 |
Fixed the network receive CRC and MAC checking, and added ip-checking and
minimum packet length checking to the receiver. |
dgisselq |
2921d 10h |
/ |
32 |
Brought the CPU to its first working version, to include demo. |
dgisselq |
2922d 13h |
/ |
31 |
Initial network is now working. Adding CPU control files to repository. |
dgisselq |
2923d 05h |
/ |