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[/] - Rev 57

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Rev Log message Author Age Path
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7955d 15h /
56 Number of state bits define was removed mihad 7956d 06h /
55 Changed state machine encoding to true one-hot mihad 7956d 07h /
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7989d 08h /
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7989d 12h /
52 Oops, never before noticed that OC header is missing mihad 7989d 16h /
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7989d 16h /
50 Got rid of undef directives mihad 7992d 08h /
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7992d 08h /
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7992d 08h /
47 Known issues repaired mihad 7992d 14h /
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 7997d 08h /
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 7998d 14h /
44 Added for testing of Configuration Cycles Type 1 mihad 7998d 15h /
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 7998d 15h /
42 Removed out of date files mihad 8010d 15h /
41 This commit was manufactured by cvs2svn to create tag 'rel_00'. 8089d 06h /
40 From these Wrod files PDF were created - added future improvements tadej 8089d 06h /
39 File not needed tadej 8089d 07h /
38 This file is not needed tadej 8089d 09h /
37 These files are not needed any more tadej 8089d 10h /
36 *** empty log message *** tadej 8089d 10h /
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8143d 18h /
34 Added missing include statements mihad 8158d 16h /
33 Added some testcases, removed un-needed fifo signals mihad 8159d 13h /
32 Added include statement that was missing and causing errors mihad 8167d 10h /
31 User defined constants used for Test Application tadej 8170d 05h /
30 Example of PCI testbench log file mihad 8170d 13h /
29 Xilinx synthesys log file tadej 8170d 16h /
28 pci/doc/pci_databook.pdf tadej 8171d 11h /

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