OpenCores
URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] - Rev 38

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
38 Adding testbench validation ....
We could still have some problem on the data_ready of serial_receiver block		 leonardoaraujo.santos 4481d 10h /
37 Working on the documentation leonardoaraujo.santos 4482d 11h /
36 Working on the documentation leonardoaraujo.santos 4482d 12h /
35 Bug really fixed... Some testbench results saved... Now would be a nice Idea to start thinking about documentation... leonardoaraujo.santos 4485d 12h /
34 Seems that the issue is solved (working on Spartan3E board and confirmed with chipscope) leonardoaraujo.santos 4485d 15h /
33 Adding some images leonardoaraujo.santos 4486d 17h /
32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...		 leonardoaraujo.santos 4486d 20h /
31 Working on documentation and on Chipscope leonardoaraujo.santos 4487d 08h /
30 Preparing to work with chipscope leonardoaraujo.santos 4487d 08h /
29 Preparing to work with chipscope leonardoaraujo.santos 4487d 09h /
28 Changing wrong datasheet of Spartan3A kit for newer one.... Detected some bug on the reception (When is fast it seems that the reception could be wrong...) leonardoaraujo.santos 4487d 10h /
27 First version seems working nice on the PC!!! leonardoaraujo.santos 4487d 10h /
26 Adding Spartan3A Starter kit leonardoaraujo.santos 4487d 17h /
25 Adding some sample code on the doc folder, also adding the wishbone public domain library file leonardoaraujo.santos 4487d 18h /
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 4488d 16h /
23 Working on uart_control refactoring leonardoaraujo.santos 4488d 17h /
22 Refactoring the uart_control leonardoaraujo.santos 4488d 20h /
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 4489d 02h /
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 4489d 10h /
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4489d 11h /
18 sdsd leonardoaraujo.santos 4489d 17h /
17 Working on slave testbench and fixing some bugs leonardoaraujo.santos 4489d 19h /
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4489d 19h /
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4489d 20h /
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4490d 16h /
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4490d 17h /
12 Working on the communication blocks leonardoaraujo.santos 4490d 18h /
11 Adding uart_communication_block leonardoaraujo.santos 4490d 20h /
10 Working on the control unit part leonardoaraujo.santos 4491d 00h /
9 Adding Control unit for uart block leonardoaraujo.santos 4491d 12h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.