OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 52

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Rev Log message Author Age Path
52 fix bugs simont 7925d 06h /
51 fix bugs simont 7927d 11h /
50 fix bugs simont 7927d 12h /
49 verification added simont 7934d 11h /
48 added program for rom converting simont 7942d 07h /
47 remove unused files simont 7942d 07h /
46 prepared header simont 7942d 07h /
45 prepared header simont 7942d 07h /
44 prepared header simont 7942d 08h /
43 remove unused files simont 7942d 09h /
42 *** empty log message *** simont 7942d 09h /
41 remove unused files simont 7942d 09h /
40 added sigals for interacting with external ram simont 7962d 11h /
39 added signals ack, stb and cyc simont 7969d 09h /
38 fix some bugs simont 7969d 09h /
37 added signals ack, stb and cyc simont 7969d 10h /
36 fix bugs in mode 0 simont 7969d 10h /
35 design docunemt simont 7970d 08h /
34 specification docunemt simont 7970d 08h /
33 fix some bugs simont 7970d 14h /
32 overflow repaired simont 7970d 14h /
31 fix some bugs simont 7977d 06h /
30 mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32 simont 7980d 13h /
29 fix some bugs simont 7980d 13h /
28 remove syn signal simont 7980d 14h /
27 fix some bugs simont 7980d 14h /
26 main divider logic was optimized not optimized by compiler, so I did it by hand markom 7980d 16h /
25 divider and multiplier pass test markom 7981d 10h /
24 intensively tests all instructions markom 7981d 15h /
23 mul & div use 4 clocks simont 7982d 05h /

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