OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 68

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Rev Log message Author Age Path
68 add instruction cache and DELAY parameters for external ram, rom simont 7957d 19h /
67 add parameters for instruction cache simont 7957d 19h /
66 added xrom_test simont 7958d 15h /
65 add oc8051_icache and oc8051_cache_ram simont 7958d 15h /
64 signal es_int=1'b0 simont 7958d 15h /
63 initial import simont 7958d 15h /
62 fix bugs in instruction interface simont 7958d 15h /
61 fix bug simont 7959d 18h /
60 initial inport simont 7960d 18h /
59 add external rom simont 7964d 13h /
58 add external rom testing simont 7964d 13h /
57 add module oc8051_xrom simont 7964d 13h /
56 initial CVS input simont 7964d 13h /
55 added parameter DELAY simont 7964d 13h /
54 cahnge interface to instruction rom simont 7964d 13h /
53 initial CVS inport simont 7964d 13h /
52 fix bugs simont 7964d 14h /
51 fix bugs simont 7966d 18h /
50 fix bugs simont 7966d 19h /
49 verification added simont 7973d 19h /
48 added program for rom converting simont 7981d 14h /
47 remove unused files simont 7981d 15h /
46 prepared header simont 7981d 15h /
45 prepared header simont 7981d 15h /
44 prepared header simont 7981d 16h /
43 remove unused files simont 7981d 17h /
42 *** empty log message *** simont 7981d 17h /
41 remove unused files simont 7981d 17h /
40 added sigals for interacting with external ram simont 8001d 19h /
39 added signals ack, stb and cyc simont 8008d 17h /

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