URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

Subversion Repositories RISCMCU

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Rev	Log message	Author	Age	Path
23	A demo of MAX+plus II .scf simulation file The waveform shows how the MCU output 3, 2 and 1 to port B, port C and port D using different instructions.	yapzihe	8015d 20h	/
22	hex2mif readme file	yapzihe	8015d 20h	/
21	hex2mif executable for windows	yapzihe	8015d 20h	/
20	a simple demo program that output 3, 2, 1 to port b, c and d with different way.	yapzihe	8015d 20h	/
19	1. Remove the use of frequency divider 2. Uses the same external interrupt pin and timer external clock source pin as AT90S1200 3. Adds some comments to each module instantation.	yapzihe	8017d 17h	/
18	no message	yapzihe	8024d 08h	/
17	RISCMCU Slides Presentation (PDF, 112 KB)	yapzihe	8030d 00h	/
16	RISCMCU Thesis (PDF, 669 KB)	yapzihe	8030d 00h	/
15	rename file to RISCMCU_Thesis.pdf	yapzihe	8030d 01h	/
14	Thesis (PDF 668KB)	yapzihe	8030d 12h	/
13	removed old version	yapzihe	8030d 13h	/
12	RISCMCU THESIS (PDF, 668KB)	yapzihe	8030d 13h	/
11	My thesis for the RISCMCU project, in PDF	yapzihe	8032d 17h	/
10	hex2mif is used to convert HEX file to MIF format	yapzihe	8032d 18h	/
9	Real applications for testing the microcontroller	yapzihe	8032d 18h	/
8	move all the VHDL files to here from 'RISCMCU' directory	yapzihe	8032d 18h	/
7	move to 'vhdl' directory	yapzihe	8032d 18h	/
6	This commit was manufactured by cvs2svn to create tag 'arelease'.		8049d 11h	/
5	no message	yapzihe	8049d 11h	/
4	I have rearranged some of the codes and added some comments to reflect more clearly what I write in my thesis. It is not tested with the FLEX10K.	yapzihe	8049d 11h	/
3	Change the 3 level deep hardware stack to 4 level	yapzihe	8049d 12h	/
2	no message	yapzihe	8049d 12h	/
1	Standard project directories initialized by cvs2svn.		8049d 12h	/

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[/] - Rev 23

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