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URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

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24 refer to counter.asm and counter.lst in the asm directory yapzihe 8015d 11h /
23 A demo of MAX+plus II .scf simulation file
The waveform shows how the MCU output 3, 2 and 1 to port B, port C and port D using different instructions.		 yapzihe 8015d 11h /
22 hex2mif readme file yapzihe 8015d 11h /
21 hex2mif executable for windows yapzihe 8015d 11h /
20 a simple demo program that output 3, 2, 1 to port b, c and d with different way. yapzihe 8015d 11h /
19 1. Remove the use of frequency divider
2. Uses the same external interrupt pin and timer external clock source pin as AT90S1200
3. Adds some comments to each module instantation.		 yapzihe 8017d 08h /
18 no message yapzihe 8023d 23h /
17 RISCMCU Slides Presentation (PDF, 112 KB) yapzihe 8029d 15h /
16 RISCMCU Thesis (PDF, 669 KB) yapzihe 8029d 15h /
15 rename file to RISCMCU_Thesis.pdf yapzihe 8029d 16h /
14 Thesis (PDF 668KB) yapzihe 8030d 03h /
13 removed old version yapzihe 8030d 04h /
12 RISCMCU THESIS (PDF, 668KB) yapzihe 8030d 04h /
11 My thesis for the RISCMCU project, in PDF yapzihe 8032d 08h /
10 hex2mif is used to convert HEX file to MIF format yapzihe 8032d 09h /
9 Real applications for testing the microcontroller yapzihe 8032d 09h /
8 move all the VHDL files to here from 'RISCMCU' directory yapzihe 8032d 09h /
7 move to 'vhdl' directory yapzihe 8032d 09h /
6 This commit was manufactured by cvs2svn to create tag 'arelease'. 8049d 02h /
5 no message yapzihe 8049d 02h /
4 I have rearranged some of the codes and added some comments to reflect more clearly what I write in my thesis. It is not tested with the FLEX10K. yapzihe 8049d 03h /
3 Change the 3 level deep hardware stack to 4 level yapzihe 8049d 03h /
2 no message yapzihe 8049d 03h /
1 Standard project directories initialized by cvs2svn. 8049d 03h /

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