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Rev Log message Author Age Path
66 Remove the stand-alone ethmac test. Use boot-loader-ethmac instead to verify ethmac functionality. csantifort 4087d 00h /
65 Renamed boot-loader to boot-loader-serial csantifort 4087d 00h /
64 Support latest Xilinx ISE 14.5 software. csantifort 4087d 01h /
63 Add support for Xilinx ISim Verilog simulator.
Remove Virtex-6 files.		 csantifort 4087d 05h /
62 Added source for amber-pkt2mem csantifort 4239d 17h /
61 Add new netowkr based boot loader.
Remove support for Virtex. Spartan 6 only now.		 csantifort 4373d 23h /
60 Bug fix; removed a combinational loop from the a25_decode logic. csantifort 4591d 19h /
59 Added modelsim script for reloading a wlf file after a simulation has been rerun. csantifort 4661d 17h /
58 Use TB.clk_count for the decompiler messages and removed the local counter csantifort 4661d 20h /
57 Add some debug messages csantifort 4661d 20h /
56 Remove the timeouts file from svn. Its an output file and gets now just gets created automatically
when sims are run for the first time.		 csantifort 4661d 21h /
55 Added sudo to rm mnt command csantifort 4661d 21h /
54 Bug fix for bug reported by Botao Lee. The mode bits in the decode stage did not change immediately
after a mode switch from a teqp instruction, but 1 cycle later. This meant the wrong set of registers
was selected for writing to for 1 clock cycle.		 csantifort 4678d 20h /
53 Cleaned up Amber Verilog, removing unused signals. csantifort 4693d 18h /
52 Fixed typo in notes on creating DDR memory interfaces using coregen csantifort 4693d 18h /
51 Revert vmlinux back to 48. csantifort 4734d 18h /
50 Revert to previous version csantifort 4734d 18h /
49 Added a note n how to change timeouts csantifort 4734d 18h /
48 Fixed a bug in linux that caused the os to not return to the running application after an interrupt.
Hello-world now runs stand-alone again.
Added initrd-200k-dhry, a disk image that uses the dhry program for init.		 csantifort 4739d 00h /
47 Changed V6 VCo from 1000Mhz to 1200 MHz csantifort 4758d 22h /
46 svn ignore vmlinux.dis and vmlinux.mem csantifort 4766d 20h /
45 Store vmlinux.mem and vmlinux.dis in compressed form csantifort 4766d 20h /
44 Updated vmlinux image based on last change csantifort 4766d 20h /
43 Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test.
Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.		 csantifort 4766d 20h /
42 Added write buffer - fixes bug if wishbone writes takes multiple cycles to complete csantifort 4784d 17h /
41 Added instructions on how to use Coregen to create the Spartan-6 DDR3 memory interface. csantifort 4786d 01h /
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.		 csantifort 4790d 18h /
39 Added a second level of buffering to a25_wishbone_buf to fix a lockup
bug when write acks to not return immediately, and also to improve performance slightly		 csantifort 4791d 18h /
38 support 128-bit wishbone now used for a25 core csantifort 4792d 18h /
37 128-bit wide boot memory module csantifort 4793d 16h /

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