OpenCores
URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] - Rev 38

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
38 clean up the VC router wsong0210 4787d 05h /
37 SDM/wormhole ready wsong0210 4787d 11h /
36 add simply description wsong0210 4787d 11h /
35 test bench ready wsong0210 4787d 12h /
34 debug wsong0210 4788d 13h /
33 debug wsong0210 4788d 13h /
32 currently debugging the simulation compiling wsong0210 4789d 10h /
31 test bench ongoing wsong0210 4790d 10h /
30 test bench cleaning up ongping wsong0210 4791d 11h /
29 begin the test environment wsong0210 4792d 11h /
28 merge the synthesis scripts in the branch init to trunk wsong0210 4792d 12h /
27 eliminate timing loops in all router architectures wsong0210 4792d 12h /
26 wormhole router compile OK wsong0210 4793d 12h /
25 resolve conflict wsong0210 4794d 05h /
24 make a branch wsong0210 4794d 06h /
23 try commit wsong0210 4794d 06h /
22 roll back wsong0210 4794d 06h /
21 prepare trunk wsong0210 4794d 06h /
20 prepare trunk wsong0210 4794d 06h /
19 sdm router ready wsong0210 4794d 12h /
18 allocators_modify wsong0210 4795d 11h /
17 allocators wsong0210 4795d 11h /
16 input buffers wsong0210 4795d 13h /
15 update license wsong0210 4796d 07h /
14 output buffers wsong0210 4796d 11h /
13 router structure configuration wsong0210 4796d 11h /
12 crossbars wsong0210 4796d 12h /
11 arbiters wsong0210 4796d 13h /
10 script for async cell lib disable timing arc wsong0210 4798d 14h /
9 cell library setting up script wsong0210 4799d 05h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.