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116 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7613d 19h /
115 Artisan ram instances added. simons 7613d 19h /
114 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7640d 19h /
113 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7640d 19h /
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7640d 19h /
111 Fixed according to the linter.
Case statement for data_out joined.
mohor 7642d 19h /
110 Fixed according to the linter. mohor 7642d 19h /
109 Fixed according to the linter. mohor 7642d 21h /
108 Fixed according to the linter. mohor 7642d 21h /
107 Fixed according to the linter. mohor 7642d 21h /
106 Unused signal removed. mohor 7648d 19h /
105 This commit was manufactured by cvs2svn to create tag 'rel_11'. 7649d 09h /
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.
tadejm 7649d 09h /
103 This commit was manufactured by cvs2svn to create tag 'complete_1'. 7651d 23h /
102 Little fixes (to fix warnings). mohor 7651d 23h /
101 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7656d 01h /
100 Synchronization changed. mohor 7656d 01h /
99 PCI_BIST replaced with CAN_BIST. mohor 7656d 01h /
98 This commit was manufactured by cvs2svn to create tag 'rel_9'. 7661d 12h /
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7661d 12h /
96 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7661d 14h /
95 Virtual silicon ram instances added. simons 7661d 14h /
94 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7667d 01h /
93 synthesis full_case parallel_case fixed. mohor 7667d 01h /
92 clkout is clk/2 after the reset. mohor 7667d 09h /
91 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7667d 22h /
90 paralel_case and full_case compiler directives added to case statements. mohor 7667d 22h /
89 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7668d 20h /
88 Previous change removed. When resynchronization occurs we go to seg1
stage. sync stage does not cause another start of seg1 stage.
mohor 7668d 20h /
87 When hard_sync or resync occure we need to go to seg1 segment. Going to
sync segment is in that case blocked.
mohor 7668d 20h /

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