OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] - Rev 183

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
183 monitor, several changes hellwig 3599d 09h /
182 monitor, several changes hellwig 3599d 09h /
181 hardware got BadAccess register; synthesizer result eco32.bit now included hellwig 3601d 23h /
180 monitor recognizes BadAccess register hellwig 3603d 08h /
179 even more NetBSD init tests hellwig 3612d 18h /
178 more NetBSD init tests hellwig 3617d 09h /
177 more NetBSD init tests hellwig 3619d 04h /
176 NetBSD tests updated hellwig 3619d 06h /
175 another NetBSD init test hellwig 3624d 03h /
174 NetBSD makefs recognizes specfile hellwig 3625d 05h /
173 another test program for the emerging NetBSD port hellwig 3626d 08h /
172 os-bin/NetBSD/init_04: .bss moved to correct place hellwig 3635d 23h /
171 NetBSD tests (init_xx) updated hellwig 3640d 23h /
170 text file added to NetBSD file system hellwig 3642d 06h /
169 more test programs for the emerging NetBSD port hellwig 3642d 06h /
168 simulator got BadAccess register hellwig 3648d 08h /
167 fs-NetBSD/makefs.c: eliminated unused variable hellwig 3651d 05h /
166 sim/mmu.c: simplified assocDelay hellwig 3651d 05h /
165 building NetBSD filesystem hellwig 3667d 07h /
164 NetBSD/sbin removed hellwig 3667d 07h /
163 NetBSD/sbin/init_00 removed hellwig 3667d 07h /
162 NetBSD: sbin with init_00 added hellwig 3669d 23h /
161 -m32 flag added for compiling lcc hellwig 3679d 01h /
160 fs-NetBSD/dsklbl.c: emit warning that checksum may have been re-computed hellwig 3694d 00h /
159 console display: proper name, run-sim: more memory and two terminals hellwig 3709d 07h /
158 bump version number to 0.24 hellwig 3740d 22h /
157 tagging eco32-0.23 hellwig 3740d 22h /
156 history update hellwig 3740d 23h /
155 hwtests: kbdtest README hellwig 3741d 05h /
154 hwtests: jalrtest README hellwig 3741d 08h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.