URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] - Rev 44

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
44	no message	fisher5090	6606d 08h	/
43	no message	fisher5090	6606d 12h	/
42	no message	fisher5090	6606d 12h	/
41	no message	fisher5090	6606d 12h	/
40	This commit was manufactured by cvs2svn to create tag 'V10'.		6612d 11h	/
39	first version	fisher5090	6612d 11h	/
38	deleted	fisher5090	6612d 12h	/
37	no message	fisher5090	6612d 12h	/
36	no message	godzilla	6675d 21h	/
35	no message	godzilla	6678d 20h	/
34	Rewritten code.	godzilla	6678d 20h	/
33	Rewritten code.	godzilla	6678d 21h	/
32	no message	fisher5090	6696d 05h	/
31	no message	fisher5090	6696d 05h	/
30	no message	fisher5090	6724d 04h	/
29	no message	fisher5090	6724d 13h	/
28	First commit. 32-bit counter. Synthesizes with no errors in Xilinx XST.	mvpratt	6726d 23h	/
27	xilinx coregen	fisher5090	6737d 04h	/
26	good edition	fisher5090	6737d 04h	/
25	no message	fisher5090	6737d 04h	/
24	First cut. One of the main culprits for the timing violations.	godzilla	6739d 20h	/
23	First cut. Original code from Easic but add some extra controls. One of the main culprits for the timing violations.	godzilla	6739d 20h	/
22	First cut. Original code from Easic but add some extra controls.	godzilla	6739d 20h	/
21	First cut. Not thoroughly tested yet but still need to implement the configuration, non-crc version and stats. So far Leonardo Precison indicates the design can run upto 101 MHz but need to remove the timing violations to increase speed.	godzilla	6739d 20h	/
20	First cut. Still need to update the document with design changes.	godzilla	6739d 20h	/
19	First cut.	godzilla	6739d 20h	/
18	works well	fisher5090	6744d 09h	/
17	crc test	fisher5090	6744d 16h	/
16	use counter	fisher5090	6748d 00h	/
15	crc module	fisher5090	6748d 00h	/

Browse

Tools

Subversion Repositories ethmac10g

[/] - Rev 44

Filtering Options