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Rev Log message Author Age Path
25 Updated SOPC Builder component and example system. edn_walter 4499d 12h /
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4499d 14h /
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4500d 08h /
22 RTC reset will clear ACC counter, but not clear ACC counter incremental. edn_walter 4500d 12h /
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4501d 08h /
20 Added SOPC Builder Component and Instantiation Example. Follow rtl/sopc/ReadMe.txt to add IP Search Path to SOPC Builder. edn_walter 4505d 13h /
19 Added pipeline registers to Real Time Clock module to improve timing. edn_walter 4505d 13h /
18 Added QuartusII Place and Route project for top level ha1588.v edn_walter 4505d 13h /
17 Updated reg.v content. edn_walter 4506d 06h /
16 Try to add sth. edn_walter 4509d 23h /
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.		 edn_walter 4512d 08h /
14 Added test case support for UDP/IPv6 PTP frames. edn_walter 4514d 08h /
13 Added test case support for single VLAN and double VLAN L2/L4 PTP frames. edn_walter 4515d 08h /
12 Added parser support for vlan tagged frames. edn_walter 4516d 06h /
11 Added parser support for L2_PTP and IPv4/v6_UDP_PTP frame formats. edn_walter 4517d 08h /
10 Added parser support for L2_PTP and IPv4_UDP_PTP frame formats. edn_walter 4518d 08h /
9 Timestamp format in the queue = seqId_16bit + msgId_4bit + timeStamp1s_2bit + timeStamp1ns_30bit edn_walter 4519d 07h /
8 Timestamp format in the queue = seqId_16bit + msgId_2bit + timeStamp_30bit edn_walter 4519d 14h /
7 Reduced the timestamp length from 80b to 30b to save memory, since the software could be fast enough to handle timestamp rollover events per 1s. Enlarged the fifo depth to 15, to accomodate 10 ptp sync messages per 1s. edn_walter 4519d 15h /
6 Reduced the size of the Vendor specific simulation library file. ash_riple 4521d 15h /
5 Added dcfifo to store ptp time stamps. ash_riple 4522d 06h /
4 Added source code and unit test for TSU. ash_riple 4523d 07h /
3 Added function block RTC and its unit test. ash_riple 4530d 07h /
2 Try to add sth. to the repository. ash_riple 4530d 07h /
1 The project and the structure was created root 4530d 14h /

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