Rev |
Log message |
Author |
Age |
Path |
186 |
Updated the SW simulator:
Fixed handling of KU/IE flags
Added preliminary support for simulated HW interrupts
Added preliminary support for timer/counter
Enlarged the BRAM in all memory maps (to be undone) |
ja_rd |
4801d 17h |
/ |
185 |
FIX: committed forgotten source file for 'memtest' demo...
Updated memtest makefile |
ja_rd |
4803d 23h |
/ |
184 |
Updated some application makefiles to make use of common makefile |
ja_rd |
4803d 23h |
/ |
183 |
Updated comments and readme file for code samples |
ja_rd |
4805d 15h |
/ |
182 |
Updated makefiles for Hello and Adventure
Removed old dependencies in Adventure demo |
ja_rd |
4805d 15h |
/ |
181 |
Bug fix: left out a link script in last commit |
ja_rd |
4805d 16h |
/ |
180 |
Removed old support code
Bits of it may yet reappear as part of the new support library |
ja_rd |
4806d 02h |
/ |
179 |
'Adventure' demo updated, removed dependencies to old support code |
ja_rd |
4806d 02h |
/ |
178 |
Added FP math support to support library
Uses code lifted from old version of GNU libc, no adaptation needed
NEEDS testing! |
ja_rd |
4806d 02h |
/ |
177 |
Modified 'Adventure' demo to use new support code |
ja_rd |
4806d 03h |
/ |
176 |
Modified 'hello' to use new support code
NOTE: the 'OPCODE EMULATOR' mentioned below is the TRAP HANDLER
The SW opcode emulation has been working for months |
ja_rd |
4806d 03h |
/ |
175 |
Updated support library
Removed spurious dependence to accursed '_impure_ptr' |
ja_rd |
4806d 03h |
/ |
174 |
started to add branch emulation to opcode emulator |
ja_rd |
4806d 03h |
/ |
173 |
New version of support code, still incomplete. |
ja_rd |
4806d 03h |
/ |
172 |
Added new version of support code, still incomplete |
ja_rd |
4807d 18h |
/ |
171 |
CPU bug fix: MFC0 instructions aborted by privilege trap should not modify any register |
ja_rd |
4808d 20h |
/ |
170 |
Fixed bug in optional emulation of EXT, INS |
ja_rd |
4809d 06h |
/ |
169 |
Fixed bug in emulation of CLO instruction
Added support for simulated hardware IRQs (incomplete) |
ja_rd |
4809d 06h |
/ |
168 |
Updated 'opcodes' simulation script to NOT use simulated mips32 instructions and trap instead (as the real CPU does) |
ja_rd |
4809d 06h |
/ |
167 |
Updated simulation script for 'hello' sample: now uses function call log.
It is useless in this demo, but it shows how to use it. |
ja_rd |
4809d 08h |
/ |
166 |
Modified simulator, added some debug functionality:
- Optional emulation of some MIPS32r2 opcodes
- Function call trace log using map file (crude implementation)
Plus a few small bug fixes |
ja_rd |
4809d 08h |
/ |
165 |
Added (very early draft, very incomplete) reserved opcode trap handler.
Updated opcode tester to test some emulated mips32 opcodes using the trap handler. |
ja_rd |
4814d 16h |
/ |
164 |
Minor typo fixes in source file |
ja_rd |
4814d 16h |
/ |
163 |
SW simulator update:
Better disassembly format (hastily tested)
New parameters: start address, breakpoint address, whether or not to trap reserved opcodes |
ja_rd |
4814d 17h |
/ |
162 |
Fixed stupid mistake in headers (date of project) |
ja_rd |
4815d 08h |
/ |
161 |
Added GPL license info to the vhdl headers
This project is becoming respectable :) |
ja_rd |
4815d 08h |
/ |
160 |
BUG FIX: the cache init code was messing the BSS initialization |
ja_rd |
4816d 10h |
/ |
159 |
bug detected but not fixed in cpu
(1st instruction after entering user mode is executed in kernel mode) |
ja_rd |
4816d 17h |
/ |
158 |
removed file from TB directory which was committed by mistake |
ja_rd |
4816d 17h |
/ |
157 |
Bug fix in the missing coprocesor exception.
The CPU was triggering a privilege exception for the mtc0 that went into user mode.
Logging HDL updated |
ja_rd |
4818d 03h |
/ |