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Rev	Log message	Author	Age	Path
24	Typos......	jguarin2002	5392d 18h	/
23	A 1 stage pipe 3 operand simultaneous adder, with parameterizable width.	jguarin2002	5392d 19h	/
22	Package file declarations : Declared component for arithmetic functions.	jguarin2002	5392d 19h	/
21	A 1 stage minimun distance comparer. This block turns out to be a collection of instances: {LT+SCANFFx2}	jguarin2002	5392d 19h	/
20	I must check that there are no latches inferred in what I want to be DFF with enable signals. The 1 stage pipe K comparison cell.	jguarin2002	5392d 19h	/
19	Added some control signals. Added a 3 operands 36 bits adder (12 ns)-> 1 stage pipe. Added a 18x18 bits multiplier (10 ns) -> 1 stage pipe. So... the dot cell goes upwards on a two stage pipe: STAGE1:{M(2,18)P1x3} STAGE2:{A(3,36)P1x1}	jguarin2002	5392d 20h	/
18	The GPL license.	jguarin2002	5406d 01h	/
17	GPL license and Julian Guarin Authoring Copyright.	jguarin2002	5406d 01h	/
16	Intersection Test Package file.	jguarin2002	5406d 01h	/
15	Some clarification	jguarin2002	5406d 01h	/
14	This is the ray tracing main block. The 3 level sphere ray intersection grid.	jguarin2002	5406d 05h	/
13	A simple unneeded line (a unnecessary library invocation), was removed.	jguarin2002	5416d 05h	/
12	A configurable chain size and stage width scan out.	jguarin2002	5416d 12h	/
11	Added and modify some comments about the performance of this square root calc.	jguarin2002	5416d 18h	/
10	Upload the uart serial interface license	jguarin2002	5428d 23h	/
9	Codes on here are interfaces blocks. The plan is to upload two interfaces with the device: an uart RS232 serial interface, and a avalon bus interface. In this revision it is to be uploaded a 460800 bps serial interface.	jguarin2002	5428d 23h	/
8	this blocks contains a package of combinatorial functions to perform square root in one or two clock cycles, it will depend on the synthesis platform you use.	jguarin2002	5428d 23h	/
7	Ooops my mistake. this was not the files I wan intended to upload.	jguarin2002	5428d 23h	/
6	this blocks contains a package of combinatorial functions to perform square root in one or two clock cycles, it will depend on the synthesis platform you use.	jguarin2002	5428d 23h	/
5	Added contact email.	jguarin2002	5430d 15h	/
4	block02.vhd: This code separates the calculation of dot product in bl00 and the comparison in bl01 in a two stage pipe.	jguarin2002	5430d 16h	/
3	block01.vhd : This block instantiates a comparator and compares two 32 bits numbers V.D and a ray/sphere relation constant called K. When a Ray (D) is meant to intersect a sphere (V), the value vd is greater or equal than a Radius/Sphere relation constant k. Therefore when this comparison is true the block drives a 1 in the output and 0 when false.	jguarin2002	5430d 18h	/
2	block00.vhd : This file contains and 18 bit x 18 bit dot product with a result of a 32 bits. The last four less significant bits are chopped after the multiplication. jguarin2002@gmail.com	jguarin2002	5430d 19h	/
1	The project was created and the structure was created	root	5449d 22h	/

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