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Rev Log message Author Age Path
63 Modified syntax of ARGV parameter for compatibility to later versions of Perl ja_rd 4503d 19h /
62 Changed all hard tabs to spaces as preamble to a minor refactor ja_rd 4504d 04h /
61 Basic demo updated: main entity name changed to keep synthesis too happy ja_rd 4872d 06h /
60 Fixed nasty typo in pin constraints file (clock input) ja_rd 4876d 11h /
59 tabs to spaces ja_rd 4900d 18h /
58 tabs to spaces ja_rd 4900d 19h /
57 removed unfinished CPM demo files ja_rd 5085d 08h /
56 file list updated ja_rd 5085d 08h /
55 Altair 4K Basic demo on DE-1 board ja_rd 5085d 08h /
54 BUG FIX: XOR operations wre not clearing CY and ACY ja_rd 5085d 08h /
53 added interrupt for single-stepping
cleaned up comments a bit		 ja_rd 5441d 09h /
52 test bench compilation script sanitized a little ja_rd 5441d 09h /
51 interrupt test bench adapted to the fix in IE instruction ja_rd 5441d 09h /
50 interrupt test bench adapted to the fix in IE instruction ja_rd 5441d 09h /
49 fixed: IE now enables interrupts after a 1-instruction delay
(it was enabling interrupts immediately)		 ja_rd 5441d 09h /
48 clarification of some terms in the comments ja_rd 5442d 01h /
47 edited the file list and added a few remarks ja_rd 5442d 01h /
46 minor change in signal color for better readability ja_rd 5442d 01h /
45 Added modelsim scripts for the test benches ja_rd 5442d 01h /
44 fixed error in RST test, added support for long intr tests
added a test of a 'long' intr pulse		 ja_rd 5442d 01h /
43 added a remark about the TASM source format ja_rd 5442d 01h /
42 test bench 1 regenerated with new template
added a test for 'long' intr pulses		 ja_rd 5442d 01h /
41 test bench 0 regenerated with new template
no changes to the test code		 ja_rd 5442d 01h /
40 test bench template now can simulate intr pulses longer than 1 cycle ja_rd 5442d 01h /
39 fixed: int request (intr) can now be wider than 1 cycle ja_rd 5442d 01h /
38 pin assignment for IMSAI demo removed ja_rd 5442d 01h /
37 IMSAI monitor demo removed ja_rd 5442d 01h /
36 CPM demo on cyclone 2 starter board
(work in progress)		 ja_rd 5442d 01h /
35 CPM demo pin assignment file (Altera Quartus II) ja_rd 5442d 01h /
34 rs232 sanitized and parametrized ja_rd 5442d 01h /

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