URL https://opencores.org/ocsvn/mkjpeg/mkjpeg/trunk

Subversion Repositories mkjpeg

[/] - Rev 70

Rev	Log message	Author	Age	Path
70		mikel262	4684d 04h	/
69		mikel262	4684d 06h	/
68		mikel262	4684d 06h	/
67		mikel262	4684d 06h	/
66	memory initialization updated	mikel262	4820d 07h	/
65	Added VHDL equivalent for Verilog's HeaderRAM.v	mikel262	4962d 16h	/
64	rel with YUV	mikel262	5270d 07h	/
63	Added YUV input support.	mikel262	5272d 02h	/
62		mikel262	5313d 06h	/
61	Design now uses 4:2:2 chroma subsampling	mikel262	5313d 16h	/
60		mikel262	5316d 04h	/
59		mikel262	5316d 06h	/
58	fix for C_EXTRA_LINES=0	mikel262	5316d 06h	/
57	default max performance	mikel262	5316d 17h	/
56	BUF_FIFO redesign, for memory/performance tradeoff	mikel262	5316d 17h	/
55		mikel262	5327d 18h	/
54		mikel262	5327d 18h	/
53		mikel262	5327d 18h	/
52	Redesigned BUF_FIFO.vhd to significantly reduce area utilization. Only memory optimized version now possible.	mikel262	5327d 18h	/
51	fix in buf fifo (synthesis problem)	mikel262	5331d 17h	/
50		mikel262	5332d 02h	/
49	Added 16 bit RGB 565 input format.	mikel262	5332d 02h	/
48		mikel262	5332d 03h	/
47		mikel262	5332d 03h	/
46	x1	mikel262	5341d 04h	/
45	stall re-added	mikel262	5341d 05h	/
44	stall re-added	mikel262	5341d 05h	/
43	stall readded	mikel262	5341d 05h	/
42	Added backpressure/stallability of output interface.	mikel262	5344d 16h	/
41	Fixed RLE ZRL bug occurring at end of 8x8 block	mikel262	5482d 04h	/