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Rev Log message Author Age Path
33 Added isr_enable(?) rhoads 8200d 00h /
32 ld -N; added pi.c rhoads 8200d 00h /
31 Calculate PI rhoads 8200d 00h /
30 fixed LWL and write to 0xffff and other bugs rhoads 8200d 00h /
29 setup $gp and zero bss, fixed a few test bugs rhoads 8200d 00h /
28 setup $gp and zero .sbss and .bss rhoads 8200d 00h /
27 Setup $gp and zero .sbss and .bss rhoads 8200d 00h /
26 Changed to gcc compiler. Strip off first 0x1000 bytes. rhoads 8202d 01h /
25 opcodes target rhoads 8202d 01h /
24 Disable interrupts upon reset. rhoads 8202d 01h /
23 Fixed div -x/y. rhoads 8202d 01h /
22 Switched to gcc compiler. rhoads 8202d 01h /
21 Moved startup to boot.asm rhoads 8202d 01h /
20 Startup code. rhoads 8202d 01h /
19 Changed simili run to 40us. rhoads 8204d 02h /
18 Fixed "divu $3,$4". "Div $3,$4" still has bug if $3*$4<0. rhoads 8204d 02h /
17 Fixed "blez $0,target". Made LWL=LW and SWL=SW. Changed tabs to spaces. rhoads 8204d 02h /
16 Fixed binary to HEX when the number of digits isn't a multiple of 4. rhoads 8204d 02h /
15 Test all MIPS I opcodes. rhoads 8204d 02h /
14 Fixed big-endian mode bugs rhoads 8208d 01h /
13 Removed reg_bank configuration control rhoads 8208d 01h /
12 Better support for dual-port memories, removed old method rhoads 8208d 01h /
11 Added comment for DEBUG mode rhoads 8208d 01h /
10 Add pause_in to process dependency, fixes "lw $4,0($4)" rhoads 8208d 01h /
9 Support for generic_tpram dual-port RAM rhoads 8213d 05h /
8 Preparing to use dual-port memory for registers. rhoads 8214d 02h /
7 Made writes 4 cycles, improved mem_ctrl.vhd rhoads 8219d 09h /
6 JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts. rhoads 8223d 07h /
5 This commit was manufactured by cvs2svn to create tag 'Version_1_0'. 8442d 07h /
4 Update web page rhoads 8442d 07h /

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