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Rev Log message Author Age Path
43 minor changes budinero 5441d 08h /
42 minor changes budinero 5441d 08h /
41 minor changes budinero 5441d 08h /
40 minor changes budinero 5441d 08h /
39 Added a read flag for each channel and adc_clk_I input budinero 5441d 08h /
38 updated control budinero 5441d 08h /
37 updated control budinero 5441d 08h /
36 added test benches budinero 5455d 20h /
35 new architecture budinero 5455d 20h /
34 name changes budinero 5455d 21h /
33 new control modules budinero 5455d 21h /
32 new control modules budinero 5455d 21h /
31 Added adc_clk and read flags. budinero 5455d 22h /
30 name changes budinero 5477d 07h /
29 added dual port memory budinero 5477d 07h /
28 budinero 5477d 07h /
27 budinero 5477d 07h /
26 budinero 5477d 07h /
25 budinero 5477d 07h /
24 name changes budinero 5477d 07h /
23 name changes budinero 5477d 07h /
22 Added test signals (will be removed) budinero 5477d 07h /
21 Added readme-first text budinero 5539d 08h /
20 Created acquisition module budinero 5539d 08h /
19 Created witdth extension (8 epp data witdh to 16 bits) budinero 5559d 20h /
18 Added old uploaded documents to new repository. root 5595d 08h /
17 Added old uploaded documents to new repository. root 5595d 20h /
16 New directory structure. root 5595d 20h /
15 Final EPP module. budinero 5637d 04h /
14 Added testing modules budinero 5641d 22h /

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